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A fully integrated CMOS receiver consisting of an LNA and a mixer has been designed and fabricated in IBM BiCMOS 7WL 180 nm technology. An on-chip balun loading the second stage of the LNA was implemented as well for single-to-differential conversion. The receiver was developed for high performance wireless local positioning systems and excellent experimental results were demonstrated: a conversion...
In this work we present a fully integrated BiCMOS RF-receiver. The receiver comprises an LNA and a mixer. The most challenging aspects of the design were the high gain and an extremely low noise figure specified by RESOLUTION. The target was to achieve an integrated LNA and mixer showing at least 25 dB voltage conversion gain and overall noise figure less than 4 dB under minimum power consumption...
This work demonstrates an integrated low noise, high gain receiver targeted for wireless local positioning applications. The receiver is implemented in a 0.18 mum SiGe BiCMOS technology. With a single ended input and differential output the receiver comprises a two stage bipolar low noise amplifier with integrated on-chip transformer for single to differential conversion and a double balanced mixer...
A 60 GHz SiGe HBT chipset for high speed wireless communication systems has been developed. The functionalities of LNA, up-converter, down-converter and PA have been realized with good performance. Design strategy, achieved results and comparison with state-of-the-art work will be presented. The work proves that single chip integration of the whole 60 GHz RF-frond-end will be possible using silicon...
This work demonstrates the design of a wideband low noise amplifier in 0.13 um CMOS technology. Important design aspects and the influence of bandwidth improving circuit elements on various LNA performance parameters like gain, matching, noise figure, and stability are analyzed. Simulated and measured LNA results are presented. At the centre frequency of 5.5 GHz the measured LNA performance includes...
This work presents a fully integrated 6 GHz LNA designed using 0.12 mum IBM CMOS technology. The amplifier consumes only 3.6 mW dc power with 1.2 V supply voltage, and features a 11 dB power gain and 3.6 dB noise figure at the frequency of 6 GHz. Additionally, it achieves -11 dBm of input referred 1 dB compression point and -0.5 dBm of IIP3. At the same time input and output matching are better than...
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