Array Signal Processor is a complex ASIC which can perform Phased array beam forming of Ultrasound Sensor data up to 32 channels. The Array Signal Processor consists of Transmit Beam Former, Transducer, and Receive Former. The Array signal Processor works based on the principle of Pulse-echo Processing. When the voltage is applied to the transducer probe, pulses are produced due to piezoelectric effect (transmit-beam former). These pulses from the transducer probe hit the target in region of interest and as a result, echoes are produced. These signals are then processed by the receiver beam former. The main processing blocks in this receiver beam former are Integer delay unit, Fractional delay unit, Apodization unit and summer unit. The Integer delay unit, Fractional delay unit, Apodization unit and summer unit are implemented in Verilog and kept as Design under Test (DUT). The same processing blocks are implemented in MATLAB and the outputs are stored in a memory. The DUT output and Matlab output will be compared and automated test results will be generated.