Multilevel converters are an emerging industrial technology and are the subject of a substantial amount of research. However, they are yet to find their way into many mainstream engineering applications. This paper presents a method of quantifying the benefits and disadvantages of multilevel converters of increasing order. The analysis focuses on the cascaded H-bride topology for grid-tie battery inverter applications. The analysis includes both semiconductors losses and semiconductor driver losses. It is shown that multilevel converters can have significant benefits over their conventional counterparts, but that more levels is not necessarily better. This paper's important result is to create a quantitative measure of the pros and cons of multilevel architecture.