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With the ever growing complexity of high-frequency systems in the electronic industry, formation of reduced-order models or compact macromodels of these systems is paramount. In this contribution, a Fourier series expansion technique is extended to form a modeling strategy to approximate the frequency-domain behaviour of a system based on several design variables. In particular, it is intended to...
Sensor networks are increasingly important for many applications in environmental monitoring, manufacturing, defense and infrastructure monitoring. Many applications introduce variable performance requirements which demand online architecture reconfiguration, including the analog-digital fron-tends to sensors. This paper presents design automation methods for deciding the design points used for dynamic...
In a printed circuit board (PCB), a guard trace can be used to reduce crosstalk between adjacent traces. Regularly-spaced vias are generally used to connect the guard trace to the solid ground plane underneath it. However, when the ground plane is slotted or gapped, this approach may not be possible due to the openings. This paper proposes to solve this problem for slotted ground planes by using a...
In this paper, a novel cellular nonlinear network emulator core which executes wave computing within an FPGA-based platform is proposed. This wave computer core has 4 ?? 4 parallel processing units and emulates 16, 384 nodes which are arranged in 128 ?? 128 normal grid form. The wave computer core can be programmed to generate active waves such as autowaves, travelling waves and spiral waves, and...
In this paper the absolute stability of 2nd order discrete-time single variable Lur'e systems is investigated. Simple sufficient conditions for the existence of a common unic Lyapunov function are presented. A necessary condition for the existence of a common unic Liapunov function for 2nd order discrete Lur'e systems is expressed as a simple restriction on the root locus of the system.
Highly nonlinear circuits are very demanding to simulate, especially when they are excited with two separate frequencies as is the case with, e.g., RF circuits and SC filters. Frequency-domain methods, e.g. harmonic balance (HB), that can handle two-tone signals are more suitable for sine wave excitations and weakly nonlinear circuits. Multivariate steady-state time-domain (MSSTD) analysis is efficient...
This paper describes new method of fault diagnosis in analog electronic circuits (AEC). Fault diagnosis in analog electronic circuits is in general tested along with one dimension: the generator frequency. In this paper, we present a novel approach that uses more than one dimension to test AEC (those new dimensions are: the load resistance & reactance, generator resistance & reactance). Proposed...
In this paper a platform that implements the digital processing and RF carrier generation for class S PA operation is presented. This implementation consists of a bandpass delta sigma modulator (DSM) with a multi-level quantizer followed by a pulse width modulator and frequency upconversion stage. The principle of operation is described and validation is provided through simulation and experimental...
In this contribution a new algorithm based on the spatio-temporal dynamics of reaction-diffusion cellular nonlinear networks (RD-CNN) for analyzing brain electrical activity in epilepsy is proposed. RD-CNN are determined in an identification process and then analyzed by means of Chuas Local Activity theory. Clinical manifestations of epileptic seizures are phenomena of abnormal, excessive, or synchronous...
DAC mismatch shaping for multibit Delta-Sigma A/D-converters has been a very popular topic in scientific publications. In recent years, most of these publications have proposed various methods on how to modify a popular data weighted averaging scheme so that it would produce less spurious tones. Many of these publications reveal different styles on reporting the performance merits. A simulation result...
In this paper, a frequency synthesizer architecture is proposed, employing a new analog-digital mixer based on signal coincidence, which achieves fast-settling, and high resolution compared with the conventional synthesizer. This new coincidence mixer, using digital error correction techniques, requires no output filters where sum and difference of input signal frequencies are obtained directly by...
A 14-bit MOS DAC is described that has current sources that are free from the non-linear current mismatch caused by ground-line voltage drop and output circuits that do not suffer from time-constant change at the output terminal when the input digital code changes. Base current sources are locally classified into two groups with two different values, and the unit current source is constructed by adding...
This paper presents a new technique that allows the realization of exact voltage gain relations in feedback amplifiers. Basically, this technique exploits the imperfect subtraction characteristics of traditional differential amplifiers, as a means to nullify the closed-loop gain error of the complete configuration. The validation of the proposed technique was achieved following a simulation perspective,...
We examine the differential power analysis attack (DPA) on a pipelined FPGA implementation of AES when decoupling capacitors are in the circuit. In a recent work, researchers pointed out the use of the decoupling capacitors is inevitable for the encryption hardware operating at high clock frequencies. Also, use of the decoupling capacitance is advisable to protect the cryptographic algorithms against...
An experimental FPGA board SASEBO-GII has been developed as a standard platform for advanced research on side-channel attacks and countermeasures. The board is equipped with a new FPGA device, Virtex-5 LX30/50, which provides large logic capacity and dynamic partial reconfiguration. Configuration data can be transferred from a host PC to the FPGA through a USB interface without using a JTAG cable...
This paper examines the nonlinear dynamics of an alias-locked loop (ALL) which uses an aliasing divider instead of a traditional frequency divider in the feedback loop of a phase-locked loop. A nonlinear model of the ALL is developed and used to study the global and local nonlinear dynamics of the system. In the global dynamics, we see disconnected regions of stability, which arise as a direct result...
A novel MEMS-based co-designed power amplifier is presented. To introduce the analysis and evaluate the impact of realistic on-chip losses, two design approaches are discussed and compared. Then the study of the novel circuit, based on the integration of high-Q BAW resonators with a Class E PA, is described. The integration method is explained, demonstrating how a careful co-design can allow to reach...
An equivalent circuit has been developed for a four-port RF transformer by exploiting the symmetry of the device. The circuit consists of four driving-point admittance RLC networks mutually connected via a transforming circuitry, ensuring the symmetry. The measured 4-port frequency responses are converted to respective driving-point admittances, which are approximated by fitting the values of the...
In this paper we present different ultra low-voltage CMOS carry generate circuits. The circuits may operate at supply voltages below the inherent threshold voltage of the transistors while maintaining a current level of transistors operating in strong inversion. The circuits show an improved performance compared to complementary CMOS in terms of delay. Preliminary results indicate a reduced delay...
This paper demonstrates the low-energy operation of a two-phase clocked adiabatic static CMOS logic (2PASCL) on the basis of the results obtained in the simulation of a 4-bit ripple-carry adder (RCA) employing 2PASCL circuit technology. Energy dissipation in the 2PASCL RCA is 71.3% lesser than that in a static CMOS RCA at transition frequencies of 10-100 MHz.
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