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This paper introduces a multi-loop fast transient response flipped voltage follower (FVF) low-dropout (LDO) voltage regulator suitable for system-on-chip (SOC) applications. While typical FVF-based LDOs exhibit fast transient response, which is critical for SOC applications, their output DC accuracy is limited due to low loop gain of the FVF. In this work, we introduce a multi-loop design aimed at...
Distributed on-chip low dropout (LDO) voltage regulators have become common due to the increasing number of on-chip voltage domains, dynamic voltage scaling, and the need for high quality power. Due to the current limitations of on-chip LDOs, hundreds of these regulators are required to deliver high quality power within modern high performance microprocessors. As the number of parallel connected LDOs...
Efficient and smart techniques for analog data acquisition and processing may play crucial role in the design of miniature wearable devices, meant to continuously record, process and wirelessly transmit vital physiological parameters for real time health monitoring. In this work we propose a low-power, all-analog processing unit for an MPG (magneto-plethysmograph) based wearable device, which is meant...
This paper presents a low power, area efficient 11bit single-ended successive-approximation-register (SAR) analog-to-digital converter (ADC) with small loading effect targeted for biomedical applications. The design features an energy-efficient switching technique with an error cancelling capacitor network to cover an input range twice the reference voltage. The ADC's loading effect to previous stage...
The audio-susceptibility of the average current-mode controlled buck dc-dc converter in continuous-conduction mode is presented in this paper. The average current-mode control scheme used in this paper regulates the true average component of the sensed inductor current and is not affected by a high inductor current ripple at low duty ratios. The principle of negative feedback for converters with the...
We present the design and implementation of a monolithic microwatt analog front end and asynchronous level-crossing ADC for efficient capture of sparse biopotentials. The low-noise differential AC-coupled front-end provides +40 dB gain, and the signal is digitized by an asynchronous level-crossing ADC which encodes the signal slope into a stream of pulses. For temporally-sparse signals such as single-unit...
We present performance characterization of a bio-potential recording system with an asynchronous readout architecture. The signal processing chain consists of a low-noise bio-potential amplifier, spike detection circuitry, and an address event representation (AER) communication protocol. The system was fabricated in a 0.5 pm CMOS technology. Each stage of the recording system was tested individually,...
This paper presents an optical receiver (RX) suitable for amplifying a high-speed PAM-4 signal. To achieve a high gain-bandwidth product at low power consumption, a triple inductively peaked regulated cascode (RGC) transimpedance amplifier is used. The inductors are implemented as small 3D solenoids to reduce chip area and optimized for minimum group delay variation. The receiver further includes...
A passive delta-sigma ADC with a voltage-controlled-oscillator (VCO) quantizer is presented. By employing the VCO quantizer, a single-bit quantizer is replaced with a multi-bit quantizer while an extra order of noise-shaping was provided. The proposed architecture does not need very large capacitors as compared to the conventional passive delta-sigma ADC. Furthermore, it also does not require external...
This paper discusses an analytical method for performance estimation of multi-stage transimpedance amplifier (TIA). For high speed and energy efficient optical communication, multi-stage TIA composed of pre-amplifier (PA) and Cherry-Hooper amplifier (CHA) are commonly used. However, it is not clear how to decide design parameters of PA and CHA. Additionally, the number of stages is also a design parameter...
A scheme to achieve simultaneously extremely high slew rate improvement and avoiding open loop gain degradation in one stage super class-AB op-amps is introduced. It overcomes the serious shortcoming of super class-AB OTAs that show very high output current enhancement factors at the expense of degrading the open loop gain. The proposed scheme uses dynamically biased cascode transistors to avoid gain...
For differential microphone arrays, most of the performance evaluation measures that are used in the context of noise reduction are based on the energy of the signal. In this paper, we propose a spectral entropy-based measure, which quantifies the ratio of the spectral information contained in the desired and actual outputs of the microphone array, and can evaluate the performance in terms of the...
This paper reports a low-power low-noise folded-cascode OTA based charge amplifier designed to be used as the front-end amplifier (FEA) for a pyroelectric transducer based respiration monitoring system. The amplifier is designed in 0.5μm standard CMOS process and consumes only 5.4 μW of power with 1.8V supply voltage. The operational transconductance amplifier (OTA) adopts a pseudo-resistor based...
In this paper, a new broadband low noise amplifier (LNA) is proposed. The LNA utilizes a composite NMOS/PMOS cross-coupled transistor pair and a difference amplifier to in-crease the linearity while reducing the noise figure. The introduced approach provides partial cancellation of distortion and noise generated by the input transistors, hence, degrading the overall distortion. The LNA is implemented...
A signal conditioning circuit with ultra-high sensitivity and ultra-low power consumption is presented for the capacitive and voltage mode microelectromechanical systems (MEMS) transducers. Two different amplifiers are chopped with two different frequencies to remove their flicker noise. A low voltage high current amplifier is implemented in the 1st stage, which improves the power consumption and...
This paper reviews our portable multi-dimensional nuclear magnetic resonance (NMR) spectroscopy system combining a 4-mm2 CMOS NMR spectrometer integrated circuit (IC) and a permanent magnet. The work was first reported in [1] with emphases on overall system development and spectroscopy experimentations. Here we pay more attention to the IC design. The scalability of the integrated spectrometer can...
In this paper we present a systematic method to synthesize and analyze fully differential input-output filters using two port networks. Transfer functions, input and output impedance can be evaluated for various impedances and transmission matrices varied to investigate the filter's performance. Experimental and simulated results in Cadence are provided.
This paper presents a new framework for the design optimization of a CMOS down-conversion mixer based on a conventional double balanced Gilbert cell. The framework exploits the gm/ID methodology to find the transistors' dimensions that optimize the tradeoff between conversion gain, noise figure, third-order intercept and power DC consumption of the mixer. The mixer has been designed using a 0.13 μm...
A low-noise and low-power signal conditioning circuit with narrow bandwidth is presented. The circuit cascades three stages. A high current and low supply voltage amplifier as the first stage decreases the thermal noise and power consumption. A differentiator and an integrator are used as the second and third stages to reach the amplification with a narrow bandwidth suitable for microelectromechanical...
In this work the design and integration of 60 GHz monolithic microwave integrated circuit (MMIC) transceiver using 0.15 um Gallium Nitride (GaN) Qorvo process that will support the Wireless Gigabit Alliance (WiGig)/802.11ad radio specifications will be presented. The wideband GaN Power Amplifier (PA) can operate at 60–65 GHz with output power of 27 dBm and large signal gain of 23.5 dB. The wideband...
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