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Fundamental physical constraints, such as noise and channel capacity, set an upper bound to theoretical performance of many systems. In this work we examine the limitations of high-speed data in modern digital wireless radio systems. Although physical constraints provide an ultimate limit, we show that signal-to-noise-plus-distortion-ratio (SNDR) and nonlinearity of modern CMOS and Bipolar technologies...
Received Signal Strength Indicator (RSSI) is simplest among various indoor localization methods. The main drawback is requiring a training phase to build fingerprints database, which is time consuming and sensitive to changes of test environment. Time based approaches such as Time of Arrival (ToA) and Time Difference of Arrival (TDoA) achieve better performance with some hardware expenditure, while...
An adaptive data driven threshold is proposed for denoising one dimensional signals. The threshold is derived in a SURE (Stein Unbiased Risk Estimator) based framework using trimmed thresholding and the wavelet coefficients are obtained by a Translation Invariant transform. A detailed mathematical derivation of a hybrid scheme of the Universal threshold and the SURE threshold with trimmed thresholding...
Blind separation of mixtures has been achieved by approximate joint diagonalization (AJD) approaches. This paper presents an approach for overdetermined blind source separation (BSS) using AJD. The approach is based on an alternative minimization of the indirect and direct least-squares criteria to the diagonal matrices in the first phase and to the mixing matrix in the second phase, respectively...
Compressive sensing (CS) is a recent signal processing paradigm that exploits the inherent sparsity in input signal through data compression before wireless transmission. Recent CS implementations have shown impressive energy-efficiencies with good signal recovery but require apriori sparsity estimation and are thus not adaptable dynamic IoT environments resulting in loss of accuracy. This paper describes...
Intravascular ultrasonic (IVUS) imaging catheters currently use ceramic piezoelectric transducers to form radial images of blood vessel walls. Further improvements in image quality may be enabled through Capacitive and Piezoelectric Micromachined Ultrasonic Transducers (CMUTs and PMUTs). Polymer PMUTs offer many benefits in imaging quality, however, the low acoustic sensitivity and high electrical...
This work is aimed toward the goal of investigating the influence of different materials on the signal-to-noise ratio (SNR) of passive neural microelectrode arrays (MEAs). Noise reduction is one factor that can substantially improve neural interface performance. The MEAs are fabricated using gold, indium tin oxide (ITO), and chemical vapor deposited (CVD) graphene. 3D-printed Nylon reservoirs are...
This paper presents an overview of high speed ADCs for wireline applications. In the first part of the paper, the need for an ADC-based wireline link is justified, which is then followed by a discussion on the architecture of an ADC-based transceiver. We conclude this paper by discussing the challenges and trade-offs of designing high speed ADCs for wireline applications.
An 8b, 1.3/1.39GS/s, 7/8.1mW two-step ADC is presented that introduces a single reference comparator based background comparator offset calibration technique. This work employs a dual-residue based inter-stage redundancy scheme to relax residue amplifier specifications (and enable high-speed operation at 0.85V supply) in a two-step ADC. Comparator offset calibration is implemented through body biasing...
A signal conditioning circuit with ultra-high sensitivity and ultra-low power consumption is presented for the capacitive and voltage mode microelectromechanical systems (MEMS) transducers. Two different amplifiers are chopped with two different frequencies to remove their flicker noise. A low voltage high current amplifier is implemented in the 1st stage, which improves the power consumption and...
Relentless pursuit of Moore's law, while providing immense speed, power, and cost benefits in digital circuits, has thrown open many challenges in analog circuit design, especially analog-to-digital converter (ADC) design. Present day ADC's must be able to achieve an extremely high level of performance in terms of both resolution and bandwidth. High-resolution and high-bandwidth input modulated parallel...
In order to improve the throughput of error correction decoding for the high-performance solid-state drives (SSDs), a semi-parallel low-density parity-check (LDPC) decoding architecture is proposed in this paper. The circuit of the LDPC decoder which can be dynamically configured with bit rate and code length is implemented using the scheduling control flow mode of single instruction multiple data...
This paper proposes a hardware architecture of the multi-band spectral subtraction method for real-time speech enhancement. The proposed hardware architecture has been implemented on field programmable gate array (FPGA) device using Xilinx system generator (XSG) and Nexys-4 development board. Multi-band approach is based on the fact the whole speech spectrum does not be affected uniformly by the colored...
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