In this letter, a third‐order wideband voltage‐mode all‐pass filter (APF) is proposed for application as a true time delay (TTD) cell. The advantages of designing a single‐stage higher order filter over cascading several lower order stages are illustrated. The proposed APF circuit is based on a single metal‐oxide‐semiconductor (MOS) transistor and is canonical because it requires one resistor, one inductor, and two capacitors. To the best of the authors' knowledge, this is the first single‐transistor third‐order APF circuit to be reported in the literature. The operation of the proposed APF is validated through post‐layout simulations in a 65‐nm CMOS technology. The simulation results demonstrate a group delay of 59.4 ps across a 13.2‐GHz bandwidth with a maximum delay‐bandwidth product of 0.783, while consuming only 3.54mW from a 1‐V supply voltage. Moreover, the designed circuit achieves an input‐referred IP3 of 19.95 dBm and occupies an area of 161.5μm × 204.8μm.