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A popular technique in regular expression matching accelerators is to decompose a regular expression and communicate through instructions executed by a post-processor. We present a complete verification method that leverages the success of sequential equivalence checking (SEC) to proving correctness of the technique. The original regular expression and the system of decomposed regular expressions...
The paper investigates the suitability of model checker based testing techniques for contract monitoring and enforcing services. In particular a contract monitoring service called Contract Compliance Checker (CCC) is considered as the system under test. The CCC is provided with an executable specification of the contract in force and is able to determine whether the actions of the business partners...
In the automotive industry requirements are often still composed of natural language text, spreadsheets, drawings, and formal models. Models are often used to describe partial aspects from the whole set of requirements. Hence, flaws and vagueness in requirements are common and hard to discover. Upcoming standards like ISO 26262 request the automotive industry to be more strict and formal on the requirements...
The verification of modern microprocessor-based systems requires stressing the cache hierarchy and effectively covering its huge state space. Cache hierarchy initialization (or preloading) is a technique that enables simulation to start from a rich, complex system-level setup, thereby simplifying the task of dynamically driving the hierarchy into the required corner cases. In this paper we introduce...
Nowadays, service oriented architecture has been given strong attention as an important approach to integrate heterogeneous systems, in which complex services are created by composing simpler services offered by various systems. The correctness of composition requires techniques to verify if the composite service behaves properly. To this end, in this paper we propose a new method for runtime monitoring...
Processors are verified for architectural correctness with instruction set simulators. Traditionally, this verification is done at the full-chip level with the focus on high-level register/memory correctness at each instruction execution. This approach is effective in a full-chip environment with all units in place so a test can be run from beginning to end. At the unit level, running a test means...
Service level agreements (SLAs) impose many non-functional requirements on services. Business analysts specify and check these requirements in business process models using tools such as IBM WebSphere Business Modeler. System integrators on the other hand use service composition tools such as IBM WebSphere Integration Developer to create service composition models, which specify the integration of...
The process of functional verification used in electronic design automation implies checking that the logic design conforms to its specifications. A verification environment is built to provide scenarios to be checked. The simulation environment contains the following blocks: generator (generates inputs), driver translates the input stimuli provided by the generator into input for the design under...
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