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Recent technical advances in Unmanned Aerial Vehicles (UAV) made a realm of applications possible. In this paper we focus on the application of following a walking pedestrian in real-time, using optimised pedestrian detection and object tracking. For this we use an on-board embedded system, offering an optimal ratio of computational power and weight. We extend the commonly used ground plane estimation...
In computer vision, the Harris corner feature detector is one of the most essential early steps in many useful applications such as 3-D reconstruction. However, if it is implemented in software, the resulting code is probably not able to be executed in real time under low cost mobile processors. This paper proposes an efficient hardware approach that offloads the repetitive feature extraction procedures...
This work describes the implementation of an object recognition service on top of energy and resource-constrained hardware. A complete pipeline for object recognition based on the BRISK visual features is implemented on Intel Imote2 sensor devices. The reference implementation is used to assess the performance of the object recognition pipeline in terms of processing time and recognition accuracy.
Camera networks are an important component of modern complex systems, be it for surveillance, human/machine interaction or healthcare. Having smart cameras that can, by themselves, perform part of the data processing improves scalability both in processing and network resources. In this paper, we present the HYBRID algorithm for multiple person tracking intended for implementation on a smart camera...
This paper proposes a novel hardware structure and FPGA implementation method for real-time detection of multiple human faces with robustness against illumination variations and Rotated faces. These are designed to greatly improve face detection in various environments, using the Adaboost learning algorithm and MCT techniques, Rotation Transformation, which is robust against variable illumination...
Many demanding photonic applications require the acquisition of images at very low light-level conditions and at high speed. Advanced imagers available on the market are generally not able to provide both performances in one detector. We present a 2-D imager based on a 32 × 32 array of “smart pixels,” each comprising a single-photon avalanche diode detector, an analog front end, and a digital processing...
A low-cost fully digital FPGA-based high count-rate coincidence system has been developed for TOF (Time of Flight) and non-TOF PET cameras. Using a hybrid of AND-logic and Time-mark technology produced both excellent timing resolution and high processing speed. In this hybrid architecture, every gamma event was synchronized by a 125 MHz system clock and generating a trigger associated with a time-mark...
A fully digital FPGA-based high count-rate coincidence system has been developed for TOF and non-TOF PET cameras. Using hybrid method combining AND-logic and Time-mark technology can gain both excellent timing resolution and high processing speed. In this hybrid architecture, every gamma event is synchronized by a 125 MHz system clock and generating a trigger associated with a time-mark given by an...
Edge detection operation is an essential part in the field of image processing. There are few ways to improve the performance of edge detection. This paper proposes a FPGA-based approach Sobel edge detection. An image is captured by a CMOS camera and converted into RGB color space and the image is converted into grayscale to obtain image intensity for edge detection. The proposed Sobel edge detection...
This paper introduces a prototype hardware design for detecting user's presence in front of computer-based video camera. The hardware implements basic image processing techniques (filtering, color-based segmentation, thresholding) producing a signal when a human-skin color segment is detected in the image frame. Experiments show that the design allows real-time user monitoring (30 fps) with 82% detection...
This paper introduces a prototype hardware design for camera-based power management of computer display. The design keeps display active only when the computer user is actually present. Otherwise it switches the display off to save energy. The hardware operates in real time (30 fps) and consumes only 150 mW of power; 35 times less than software implementation.
This paper presents a prototype FPGA design for detecting userpsilas presence in front of computer-based video camera. The hardware implements basic image processing techniques (filtering, color-based segmentation, thresholding) producing a signal when a human-skin color segment is detected in the image frame. Experiments show that the design allows real-time user monitoring (30 fps) with 82% detection...
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