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Internet of things (IOT) can be considered as a combination of effective hardware and impressive software which results in smart objects which are able to communicate and interact among themselves. However, data flow accuracy between two movable devices is a growing problem. This paper proposes and implements two approaches: Discrete Cosine Transfer (DCT) and Inter-Process Communication (IPC) for...
In general, when a embedded system is to be developed, the device drivers, operating system, and the application softwares are developed after the hardware of a embedded system is developed. If the hardware and software are developed at the same time, the development time and cost savings of the embedded system are possible.
Handheld devices are ubiquitous in today's world. With their advent, we also see a tremendous increase in device-user interactivity and real-time data processing needs. Media (audio/video/camera) and gaming use-cases are gaining substantial user attention and are defining product successes. The combination of increasing demand from these use-cases and having to run them at low power (from a battery)...
With the advancements in the hardware technology, it is now possible to transmit data over Ethernet at the rate of 100Mbps/1Gbps. The only limiting factor for such a high peed data transfer is the speed of the processor in the computer which does all the TCP/IP processing by using the TCP/IP software written in it. In the present system, the IR sensor used is taking 50 images of plasma per second...
This paper describes an efficient hardware implementation of a cross-correlation algorithm on a Field-Programmable Gate Array (FPGA) platform with the purpose of visually identifying coins. This method has the ability to compare images obtained via a video camera with those stored in memory, thereby, accepting/rejecting coins-under-test at the very high-speed demanded by today's coin validation mechanisms...
The main challenges in smart camera networks come from the limited capacity of network communications. Indeed, wireless protocols such as the IEEE 802.15.4 protocol target low data rate, low power consumption and low cost wireless networking in order to fit the requirements of sensor networks.
This paper focuses on the implementation and performance analysis of a hardware/Software implementation of a Object Request Broker (ORB) to support a network of Distributed Smart Camera (DSC) systems. We present the overall system architecture as a part of the whole System on Chip (SoC) within FPGA. The performance analysis performed on a software as well as on our hybrid implementation is explained...
We present a novel system architecture for automotive IP-camera based driver assistance applications. We assume that the video data is carried by an in-car switched IP/Ethernet network. The proposed architecture borrows concepts from the CE industry and hence fully takes advantage of the corresponding price and performance advantages. As an implementation study, a top view service is investigated...
FPGAs provide a flexible architecture for implementing many different types of machine vision algorithms. They allow heavily parallel portions of those algorithms to be accelerated and optimized for high specific performance (MIPS:Watt ratio). In comparison to ASICS, FPGAs enable low cost, quick turn prototyping and algorithm development as well as lower production costs for small quantity and one...
A smart camera processor has to perform substantial amount of processing of data-intensive operations. Hence, it is vital to identify critical segments of the processing load by involving HW/SW codesign in smart camera system design. This paper presents a novel fully automatic hybrid framework that combines heuristic and knowledge-based approaches to partition, allocate and schedule IP modules efficiently...
The computation of optical flow in video sequences is a challenging task in most camera based scene interpretation systems. In the past, most optical flow computation algorithms has been either implemented in software running on general purpose processors or designed as an application specific hardware. However, these implementations either cannot support real-time processing requirements or result...
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