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Performance and large memory space are the most prominent issues highlighted for local DNA sequences alignment. Therefore, this study is an attempt to test the systolic array approach for Smith-Waterman (SW) algorithm for improving the performance of DNA sequence alignment accelerator. The design was developed using LabVIEW and targeted to Xilinx Spartan 3E while the original SW has been used as a...
A novel 3D flash cell array architecture, called "hybrid 3D", is proposed to provide the distinctive low address selection method of stacked channels, suitable for conventional NAND page operation. The strings are composed of GAA type selector and double gate type cells, and their key characters were verified independently. The GAA selectors showed excellent and uniform switching character,...
In this paper a BISR architecture for embedded memories is presented. The proposed scheme utilises a multiple bank cache-like memory for repairs. Statistical analysis is used for minimisation of the total resources required to achieve a very high fault coverage. Simulation results show that the proposed BISR scheme is characterised by high efficiency and low area overhead, even for high defect densities...
The Niagara2 CMT system-on-chip incorporates many design-for-test features to achieve high test coverage for both arrays and logic. All the arrays are tested using memory built-in-self-test. This is supplemented with scan-based testing. Logic is tested with standard ATPG for slow-speed defects and extensive use of transition test, along with logic built-in-self-test for the SPARC cores, for at-speed...
To increase memory bandwidth with minimum area overhead, the new concept of 3D-stacked memory structure consisting of a small sense amplifier shared with a few 3D memory cells has been presented. The 16 bit 3D-stacked TiO2 memory chip was fabricated and demonstrated. The estimated bandwidth per unit area of 3D-stacked memory in sub-65 nm CMOS technology indicates that the 3D-stacked memory has potential...
Single, high energy, high LET, ions impacting on a Floating gate array at grazing or near-grazing angles lead to the creation of long traces of FGs with corrupted information. Every time a FG is crossed by a single ion, it experiences a charge loss which permanently degrades the stored information. If the ion crosses more than one FG, the threshold voltage of all those FGs interested by its track...
A low-cost intelligent mobile phone-based wireless video surveillance solution using moving object recognition technology is proposed in this paper. The proposed solution can be applied not only to various security systems, but also to environmental surveillance. Firstly, the basic principle of moving object detecting is given. Limited by the memory consuming and computing capacity of a mobile phone,...
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