The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A modified hybrid multilevel converter which is a combination of T-type converter and H-bridge is present in this paper. Beside increase output levels, another merit of this topology is larger output range compared with traditional two-level converter. Depending on the value of H-bridge floating capacitor voltage, the converter can produce 5-level, 7-level, or 9-level output voltage. The H-bridge...
This paper introduces a modified single-stage power factor correction (S2PFC) converter topology for high voltage, power and frequency (HVPF) applications which improves the power quality at utility AC side and at the load end. The modified proposed converter possess the ability of controlling the voltage and frequency independently and also simultaneously. The voltage can be controlled by PWM technique...
This article evaluates the characteristics of a proposed π-CLCL immittance converter, which is a combination of the typical π- and T-type configurations, for constant current output applications. The input-output characteristics and efficiency characteristics are analyzed experimentally. The experimental results are compared to the recently evaluated simulation results of the proposed immittance converter...
The internal dynamics governing the modular multilevel converter can be described by considering the total capacitor's voltages of each arm and the circulating currents. In this study, dynamics of the total capacitor voltage of the modular multilevel converter (MMC) is analyzed. Depending on the internal control approach adopted which ensure a symmetrical energy distribution in the arms of the converter,...
This paper proposes a single-phase bidirectional buck-boost-inverter topology. The boosting function is achieved by using a wide range of duty cycles based on the front-end buck-boost converter characteristics. The two main switches operate at 20 kHz to generate a unipolar half-cycle sinusoidal waveform. The fundamental frequency switched full-bridge inverter block converts the unipolar output of...
Due to voltage limitation of available semiconductor switches, multicell converters are required for high-power medium-voltage applications. One of the most significant types of multicell converters is cascade multicell converter categorized into symmetrical and asymmetrical ones. This paper first presents a new symmetrical cascade multicell converter in which the number of switches is optimized....
Multilevel converters are very interesting alternatives for medium and high power applications. This paper presents a new configuration of multicell converters. The main advantages of the proposed converter, in comparison with conventional Flying Capacitor Multicell (FCM) and Stacked Multicell (SM) converters, are doubling the number of output voltage levels and the RMS, improving the output voltage...
An n-level flying capacitor (FC) based active neutral point clamped (ANPC) converter is discussed in this paper. The converter is based on an arrangement of a three-level ANPC converter and a number of two-level cells creating an n-level line-to-neutral waveform. The converter is operated under a phase-shifted carrier pulse-width modulation (PWM). The mathematical model for the DC-link capacitors...
An on-chip buck converter with 3D chip stacking is proposed and the operation is experimentally verified. The manufactured converter achieves a maximum power efficiency of 62% for an output current of 70mA with a switching frequency of 200MHz and a 2x2mm on-chip LC output filter in 0.35mum CMOS. The use of glass epoxy interposer to increase the maximum power efficiency up to 71.3%, and the power efficiency...
A delay-locked loop of multi-band selector with wide-locking range and low power dissipation is presented. The architecture of the proposed delay-locked loop consists of phase frequency detector, charge pump, band selector, multi-control delay line, and start-up circuit. The multi-band selector is used to extend operation frequency of delay-locked loop by switching the multi-control delay line. The...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.