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Co-design and co-verification of complex SoC requires a virtual platform, which in an ideal case has the single source codes with hardware blocks included. An effective way to do that is using the SystemC language together with high level synthesis technology. Execution of the virtual platform requires simulation of SystemC parts, which is quite time-consuming. We present an approach to accelerate...
The complexity of heterogeneous systems has been increased during last years. One challenge of designing these systems is to deal with the application of methodologies based on Model Driven Architecture (MDA). MDA is a development framework that enables the description of systems by means of different models with transformations. This is an important area of research and consists on developping methodologies...
Simulation of the RTL model is one of the first and mandatory steps of the design verification flow. Such a simulation needs to be repeated often due to the changing nature of the design in its early development stages and after consecutive bug fixing. Despite its relatively high level of abstraction, RTL simulation is a very time consuming process, often requiring nightly or week-long regression...
This paper presents IDEA1, a validated SystemC-based simulator for WSNs. It allows the system-level performance evaluation (e.g., packet transmission and energy consumption) with elaborate models of sensor nodes. IDEA1 uses a clock-based synchronization mechanism to support simulations with cycle accurate communication and approximate time computation. Its accuracy has been validated by a testbed...
Wireless Sensor Networks consist of resource-constrained (energy, memory and processing) sensor nodes that are deployed at different locations, in order to monitor physical or environmental conditions. Several limitations exist nowadays, at simulation and at programming level, especially for heterogeneous Wireless Sensor Networks (composed of different hardware devices). Indeed, to optimize a self-organized...
Future systems will have to support multiple and concurrent dynamic compute-intensive applications, while respecting real-time and energy consumption constraints. With the increase in the design complexity of MPSoC architectures that must support these constraints, flexible and accurate simulators become a necessity for exploring the vast design space solutions. In this paper, we present an asymmetric...
Transaction Level Modelling (TLM) is an emerging design approach to accelerate Electronic System Level (ESL) design. A virtual TLM prototype of an embedded system is an integration of computation and communication. Currently, TLM communication and hardware modelling has been well discussed and standardised. However, there still exist problems in the domain of TLM for software computation modelling...
This paper introduces the integration of communication modelling into design modelling during the early stages of system development. It presents the modelling of flocking behaviour system in SystemC, which is emerging as a suitable language for designing and modelling. SystemC provides a consistent methodology for the design and refinement of complex digital systems. In this paper, a demonstrator...
Biological pathways consisted of different elements (actions and reactors) which interact together simultaneously. Because of being closer to the nature of such processes, Concurrent Simulation will result in a much more precise simulation. In this paper, we came up with a new method for parallel processing of biological networks which is based on IEEE STD 1666-2005 standard and uses SystemC for concurrent...
The design flow of a digital cryptographic device must take into account the evaluation of its security against attacks based on side channels observation. The adoption of high level countermeasures, as well as the verification of the feasibility of new attacks, presently require the execution of time-consuming physical measurements on the prototype product or the simulation at a low abstraction level...
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