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The currently used hardware validation architectures for Application Specific Integrated Circuits intended for automotive Engine Control Unit development are reviewed and a new architecture is proposed. An alternative to hardware validation by different simulation architectures is proposed and analyzed.
A standard priority-queuing system is capable of arranging packets with different traffic classes to guarantee a relatively low latency for the high priority traffic. However, in practical cases, severe delay may be caused by starting a large, low-priority frame ahead of a time-critical frame. In this paper, interspersed express traffic is evaluated, which enables preemption of non-time-critical transmission,...
In this paper we propose a technique for software-implementation of an UART (Universal-Asynchronous-Receive-Transmit) with the goal of getting a customizable UART-core which can be used as a module in implementing a bigger system irrespective of ones choice of implementation platform. Here we have written the core in VHDL (VHSIC hardware description language), implemented using XILINX ISE 10.1 Design...
Neurons are complex biological entities which form the basis of nervous systems. Insight can be gained into neuron behavior through the use of computer models and as a result many such models have been developed. However, there exists a trade-off between biological accuracy and simulation time with the most realistic results requiring extensive computation. To address this issue, a novel approach...
Evaluating and possibly improving the fault tolerance and error detecting mechanisms is becoming a key issue when designing safety-critical electronic systems. The proposed approach is based on simulation-based fault injection and allows the analysis of the system behavior when faults occur. The paper describes how a microprocessor board employed in an automated light-metro control system has been...
In this paper, we present an open architecture virtual test environment (VTE) which can be easily integrated into various modularized automatic test systems (ATS) compliant to Open Standard Architecture (OSA). The focus of this paper is to analyze and address the major issues that still prevent the application of virtual test (VT) from day-to-day's practice. As a pilot demonstration, a VHDL-AMS based...
There are many economic and technical arguments for the reduction of the number of Electronic Control Units (ECUs) aboard a car. One of the key obstacles to achieve this goal is the limited composability, fault isolation and error containment of todaypsilas single processor architectures. However, significant changes in the chip architecture are taking place in order to manage the synchronization,...
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