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This paper presents the particle swarm optimization based harmonic elimination pulse width modulation (HEPWM) technique for three-phase voltage source inverter (VSI) to reduce predominant lower order harmonics at its output. The switching strategy of power semiconductor devices of VSI decides the nature of its output voltage. In this regard, the switching strategy can be broadly classified as lower...
This paper presents a selective harmonics reduction for a 3(n+1) shared switch inverter topology utilizing optimal arrangement of the n-modulated signal. Under different modulation indices and operating power frequencies the purpose of the proposed procedure is to select an optimal load connection and/or modulation offsetting based on the desired objective function. Three performance indices are studied...
The paper describes the simple technique for the quarter-wave symmetric output voltage waveform formation of the three-phase multilevel inverter. This technique is based on the applying the appropriate natural nonsymmetric three-segment vectors switching sequence to the recently proposed simple voltage source multilevel inverter space vector PWM algorithm. Some Mathcad simulated voltages waveforms...
This paper presents two selective harmonic elimination (SHE) and a mixed SHE-selective harmonic mitigation (SHM) procedures applied to 5-level inverter. The first one is a graphical procedure to control harmonic spectrum of a given voltage and/or current waveform. A fundamental frequency technique using a reference sinusoidal signal (RSS) to modulate the output voltage waveform v0 is applied, considering...
This paper presents a seven level inverter utilizing switched-capacitor technique. Proposed topology employs two asymmetric DC voltage sources as input and generates a multilevel staircase output. The structure includes a front-end switched-capacitor based DC-DC converter cascaded by a back-end H-bridge inverter. The frontend SC DC-DC converter feeds three DC voltage levels to the H-bridge inverter...
This paper presents a procedure that works at fundamental frequency to compute switching angles in single phase 9-level converters to eliminate the third and odd triple harmonics and to reduce other low order harmonics, obtaining a low total harmonic distortion (THD). The DC voltages feeding the converter, that are equal, but variable, allow to obtain switching angles independent on modulation index...
A single phase seven level inverter topology with fewer components using proportional integration controller is presented in this paper. The pulse width modulation is employed to generate gating signals for power switches. The proposed topology can be implemented for three phase application. The Separate dc sources can be replaced by solar PV arrays. The complete system is simulated using MATLAB/SIMULINK...
In this paper, the performance of three-phase five-level neutral-point-clamped inverter using different carrier waves namely trapezoidal (T) and trapezoidal triangular (TT) with different modulation techniques applying three different modulating signals is studied. In this study, three basic level-shifted multicarrier PWM strategies namely, alternative phase opposition disposition (APOD), phase opposition...
In this paper, a new multilevel inverter topology which can be operated in both symmetrical and asymmetrical configurations has been proposed. In order to produce all steps of voltage at output, four different algorithms are proposed to find the value of DC sources. The proposed topology reduce switch count, gate driver circuits, total voltage blocking capability and isolated DC voltage sources which...
Z-Source inverter has become main aspect for buck and boost inversion, where the boost gain is limited due to more component voltage sag and swell are high. To avoid these new quasi resonant inverter called Switched-coupled-inductor quasi Z-Source Inverter (SCL-qZSI) is introduced. This SCL-qZSI adds one capacitor, coupled inductor and two diodes compare to traditional qZSI. Switching stress can be...
This paper explores the implementation of Flying Capacitor Multilevel inverter (FCMH) using Phase Disposition Pulse Width Modulation (PDPWM) strategy as a control technique for providing gate pulses. Among the three types of MH, Flying capacitor type is chosen for its better advantages. This paper aims at constructing the FCMLI from its basic two level to the consequent levels for better understanding...
Multilevel converter topologies have been receiving increased attention for medium and high power application in past years. This paper focuses on a new topology of 7-level multilevel inverter (MLI) named as improved H-bridge MLI (IHB MLI) with less number of switches than conventional type with 12 switches, which results in reduction of switching losses, switching stress and converter cost. This...
The main aim of this paper is to design a highly compatible standalone photovoltaic (PV) system with reduced switch count multilevel inverter (MLI) to feed 500W ac load with better power quality. MLI's are becoming eminent because of their high power capability with low harmonic content. Cascaded multilevel inverters are extensively preferred in PV system because it has a distinctive characteristic...
In this paper, implementation and comparisons of Nearest Vector Control and Nearest Level Control modulation techniques for 27-Level with 3-Cell Asymmetrical Cascaded H-Bridge Multilevel Inverter is presented to analyse the performance and application oriented complexity. Asymmetrical type of multilevel inverters is familiar in the view of attaining more number of levels with lesser number of cells...
This paper describes a Sliding mode control (SMC) technique for a single - phase grid connected voltage source inverter (VSI) through LCL filter for distributed generation applications. SMC technique is applied as a control method with a fixed band hysteresis controller. Mathematical modeling of the VSI circuit is done through state space analysis. This control method provides robust current voltage...
This paper proposes a new hybrid asymmetric multilevel inverter for generating the higher number of levels with reduced number of power semiconductor switches. The hybrid asymmetric multilevel inverter consists of full bridge inverter and reduced switch inverter topology. The reduced switch inverter topology can generate 13-level output voltage without utilizing full bridge inverter. When the full...
Multilevel inverter has numerous features for high and medium voltage applications. The size and complexity of multilevel inverter topologies limits its applications. In this paper performance comparison of seven and five levels inverter is presented. For both inverters cascaded H-bridge and reduced switched topologies are used. Performance of the inverters is compared topological and by reduction...
This paper solves harmonic elimination problem, and minimizes total harmonic distortion by a recently developed heuristics: moth-flame optimization method. 5th and 7th order harmonics are eliminated for a seven level cascaded multilevel inverter, and 5th, 7th, 11th and 13th order harmonics are eliminated for an eleven level cascaded multilevel inverter. Simulation results of a seven level cascaded...
This paper introduces a unique seven level five switch Inverter with different type of filters to reduce total harmonic distortion (THD) and suitable for renewable energy applications. In conventional inverters output voltage and current waveforms are very far from the sinusoidal shape due to high percentage of THD. This type of distorted output voltage is not suitable for industrial drives and renewable...
This paper presents the simulation of a Three Phase Five Level Cascaded H-bridge Multilevel Inverter. Third Harmonics Injection Pulse Width Modulation (THIPWM) technique was employed through s-function approach in SIMULINK environment to minimize the complexity of circuit design. The advantages of THIPWM are revealed in term of voltage and current THD reduction compared to Sinusoidal Pulse Width Modulation...
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