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IEEE 1588 is a promising way of time synchronization in control systems that include IT. Intermediate devices such as network switches are needed when the control systems are built on a multi-hop network for wide area operations. However, the introduction of switches causes conflicts between the reply packets from the devices in a switch, and thus, the delays on the backward and forward paths would...
This paper presents a new approach to time stamp messages in underwater acoustic communication. Message time stamping is a widely used method for synchronizing two clocks over a cabled or wireless communication, by exchanging time information in pilot messages. In this work we use a National Instruments Field-Programmable Gate Array (FPGA) for performing deterministic hardware time stamp of windowed...
An adjustable pulse module with FPGA-based 0.1 ns resolution is designed, which has the function of simultaneously generating multi-channel pulse. Various pulses time delay can be adjusted each other. Therefore it can improve the small target RCS (radar cross section) test accuracy under the complex environment. At present, the technology is successfully applied to a RCS tester.
The digital part of UWB system is replaced by a new one, which is more robust and provide an immense improvement of the system output data rate. The impact of the new sampling module on the system is being discussed. The effect of the clock jitter and drift on the system performance is also addressed, since jitter and drift is our biggest problem right now. System was operated for two times with time...
A hardware-based solution of precise time synchronization over Ethernet was proposed for Networked Control System (NCS). Using Field-programmable Gate Array (FPGA), hardware-based solution was designed for implementing time synchronization protocol defined in IEEE 1588. Timestamp capture, oscillator frequency compensation, time synchronization and etc., were all coded with Very High Speed Integrated...
A new adaptive full digital bit synchronizer, which uses the structure of digital phase-locked loop comprised of lead-lag phase detector and direct digital synthesizer (DDS) is designed based on FPGA. The synchronizer has adaptive characteristic, so the modified quantities of phase can be self adjustment based on difference of the phase. It has also programmable characteristic, so frequency resolution,...
This paper presents an FPGA-based ultrasonic location system. This system uses low-cost FPGAs and ultrasonic transducers to provide 3-D location to mobile nodes in an indoor environment. Synchronization is reached using the radiofrequency transducers that mobile nodes usually include. FPGAs have been used to sample ultrasonics and radiofrequency inside a custom peripheral which is attached to a MicroBlaze...
Time based localisation methods like GPS are widely used for outdoor navigation, whereas indoor navigation is typically performed only on a cell-basis or based on the Received Signal Strength Indicator. Since RSSI is not able to fulfil all current requirements, Time of Arrival and Time Difference of Arrival based approaches have recently gained focus. As time based localisation has high demands on...
Hardware-timestamping is essential for achieving tight synchronization in networking applications. This mechanism is selectively used on few high-cost tailored systems. Actual muP-based implementations fail on deterministic timestamp retrieval and insertion inside the message. This problem degrades significantly the synchronization between network nodes. This paper describes the analysis, implementation,...
NTP and IEEE1588 are two widely used protocols for clock synchronization in large distributed systems. NTP has its limitation that the synchronization accuracy is normally no better than 1 millisecond. The realization of the IEEE1588 system needs expensive components such as high-end microcontrollers or dedicated 1588 network hardware. This paper puts forward a method based on FPGA and short broadcast...
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