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Post-silicon validation is the last level of inspecting the silicon before it is delivered to the customer. Automotive microcontrollers use Direct Memory Access (DMA) extensively in safety critical applications. This article explains how post-silicon validation can be improved to address the needs of the growing complexity of microcontrollers with a large number of Intellectual Property (IP). With...
Programmable Virtual Networks (PVNs) make the network more flexible and allow the fast introduction of new services. However, several shortcomings hamper their wider adoption, including: (i) the extensive knowledge required to configure and manage the NetApps, (ii) the lack of descriptors to detail all nuances of the NetApps, and (iii) there is no solution that enables to distribute and configure...
Evolution and maintenance processes are important but time consuming and expensive. It is very important to make the processes effective and efficient. A software developer can use resource like user opinion data to get information, such as user request, bug report, and user experience. It represents user needs and can be used to help allocate the necessary effort of software evolution and maintenance...
Recurring bugs are common in software systems, especially in client programs that depend on the same framework. Existing research uses human-written templates, and is limited to certain types of bugs. In this paper, we propose a fully automatic approach to fixing recurring crash bugs via analyzing Q&A sites. By extracting queries from crash traces and retrieving a list of Q&A pages, we analyze...
This paper aims to help to differentiate security related crashes from benign vulnerabilities, using static taint-analysis. To achieve this goal, we propose a tool named Crash Filter, which determines if a crash can be made to be exploitable or not, by analyzing ARM binary codes. We envision that the proposed analysis would help to timely fix security-critical bugs.
MPX implements hardware accelerated support for detection and prevention of memory corruption. This paper will examine the effectiveness of MPX. Herein we attempt to find false positives and false negatives, and to determine what attacks may still be feasible. In particular we wish to see if a system protected by MPX is still exploitable. Intel MPX appears to provide a solid mitigation technique,...
Detecting vulnerabilities in binary codes is one of the most difficult problems due to the lack of type information and symbols. We propose a novel tool to perform symbolic execution inside the routines of binary codes, providing easy static analysis for vulnerability detection. Compared with existing systems, our tool has four properties: first, it could work on binary codes without source codes,...
Simulation-based functional verification is the key validation methodology the industry. The performance of logic simulators, however, is not sufficient to attain acceptable verification coverage on large industrial designs within the time-frame available. Acceleration platforms are a valuable addition to the verification effort in that they can provide much higher coverage in less time. Unfortunately,...
Optimizing time and effort in embedded systems design is essential nowadays. The increased productivity gap together with the reduced time to market make the design of some components of the system the main design bottleneck.Taking into account the natural complexity of HdS design, a software checking technique helps finding bugs. However the increasing complexity of HdS makes the development and...
The amount of data that is observed during at-speed silicon debug is limited by the capacity of the on-chip trace buffers. To increase the debug observation window, we propose a low-cost debug architecture for at-speed silicon debug based on lossy compression. The proposed architecture enables a new debug methodology that accelerates the identification of the erroneous samples that occur intermittently...
Due to increases in design complexity, routing a reset signal to all registers is becoming more difficult. One way to solve this problem is to reset only certain registers and rely on a software initialization sequence to reset other registers. This approach, however, may allow unknown values (also called X-values) in uninitialized registers to leak to other registers, leaving the design in a nondeterministic...
This work focuses on the use of functional qualification for measuring the quality of co-verification environments for hardware/software (HW/SW) platform models. Modeling and verifying complex embedded platforms requires co-simulating one or more CPUs running embedded applications on top of an operating system, and connected to some hardware devices. The paper describes first a HW/SW co-simulation...
Data races can occur even in sequential programs due to asynchronous software interrupts (e.g., UNIX signals). In this paper, we propose and implement a new tool DRACULA that dynamically detects data races caused by UNIX signals. DRACULA has many positive characteristics like full-automation, no source code required, high scalability, and synchronization mechanism independence, which make DRACULA...
Power management has fast become specialized in different spaces. There are different schools of thought and methodologies of verification, depending on whether youpsilare looking at server, desktop, mobile or ultra-mobile spaces. For pre-silicon verification, the challenges are unique, and numerous tools and methodologies are used to ensure that as many bugs are found pre-silicon. This paper outlines...
Heavyweight security analysis systems, such as taint analysis and dynamic type checking, are powerful technologies used to detect security vulnerabilities and software bugs. Traditional software implementations of these systems have high instrumentation overhead and suffer from significant performance impacts. To mitigate these slowdowns, a few hardware-assisted techniques have been recently proposed...
Performance evaluation techniques for fundamental graphics algorithms and for algorithms to be used in multimedia and embedded systems are investigated. Models of computation considering only arithmetic and logic operations taken on input data are regarded as inadequate for processors with instruction-level parallelism. For experimental evaluation of graphics algorithms clock-cycle counting is found...
Design errors (or bugs) inadvertently escape the pre- silicon verification process. Before committing to a re-spin, it is expected that the escaped bugs have been identified during post-silicon validation. This is however hindered by the presence of blocking bugs in one erroneous module that inhibit the search for bugs in other parts of the chip that process data received from the erroneous module...
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