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The design of today's systems on chip (SoC's) raises difficult issues, in particular regarding verification. In their early design phases, hardware/software embedded systems are commonly described as ESL (Electronic System Level) models, such that their functional and transactional behavior can be analyzed by simulation. To enhance this validation process, we have previously developed a framework...
The increase in performance and internal memory of current DSP cores allows most applications to have software only implementations. However, recent applications in telecommunications (e.g. MPEG-4) require more and more computational power. A solution to this problem is to implement a subset of the algorithm in hardware. In this paper we present a software only and a mixed hardware/software solution...
Targeting the rapid development, with reduced complexity, of power converters control techniques, a field-programmable gate array (FPGA) based platform is proposed. The aim of the platform is to provide an effective support to the developer in the error-prone process associated to a traditional FPGA design flow. This work also enables remote hardware reconfiguration, and networking monitoring of power...
In order to dynamicly monitor and manage the working state of space science experiment payloads, the large volume of science data should be performed for real-time transmission. According to this requirement, the paper proposes a design scheme of main information network based on Ethernet. A microprocessor TMS320F2812 and the Ethernet interface chip KSZ8851 are applied to set up the Ethernet communication...
This paper describes a flexible hardware and software architecture that is simple, works with almost all Software Defined Radios (SDR) in market today and is vendor independent in its implementation. Usually, an engineer targets a particular platform which needs considerable time and manpower for process of design and development. The proposed architecture can be applied almost exclusively to the...
At present, the research on security of computer system and searching for malicious codes pays more attention to cryptographic algorithms recognition technology. However, the existing theories or tools in the field of cryptographic algorithms recognition are not mature. In order to improve the accuracy of cryptographic algorithms recognizing, this paper discusses encryption and decryption functions...
Server-terminal based distributed speech recognition (DSR) applications are widely adopted on mobile devices. In this paper, we have implemented a power-efficient DSR solution of high performance for real-time speech processing. The DSR frontend algorithms are elaborately optimized in assembly codes utilizing accelerating technics provided by a previously released audio DSP, such as binary scaling...
Combined TMS320C6455DSP and FPGA data acquisition platform, this paper describes the C6455 DSP Enhanced Direct Memory Access (EDMA) hardware architecture and configuration methods, focusing on the EDMA applied in two ways, both of which increase the transmission DSP data transfer speed, enhanced the DSP processing power to meet the physical layer of TD-LTEA complex algorithms in real time operations...
In recent years, along with the rapid development of chip technology, foreign motion controller taking DSP or FPGA as core processor has increasingly become a development trend. This paper finishes the software design of a motion controller based on DSP. The whole system software is designed modularly, including system initialization module, interrupt module, PID control algorithm module and PWM output...
This paper puts forward the background of the CRC arithmetic by which it means how important the arithmetic can be in the field of the communication, tells us the principles of CRC arithmetic, introduces a kind of common ways about how to make the code and how to decode of the CRC arithmetic, uses a lot of words to introduce how the CRC codes be made through one kind of the CRC arithmetic which is...
How to load and deal with real-time audio watermarking, and how to perform the audio watermarking algorithm in the DSP chip are two points that this paper focuses on. This paper expatiates on a real-time processing for fast audio watermarking algorithm. The algorithm is available for the implementation in DSK5402. Experimental data shows the algorithm has good transparency and robustness in audio...
How to perform the audio watermarking algorithm in the DSP chip, and how to load and deal with real-time audio watermarking are two points that this paper focuses on. A real-time processing for fast audio watermarking algorithm is mentioned in this paper. The algorithm is available for the implementation in DSK5402. Experimental data shows the algorithm has good robustness and transparency in audio...
This paper presents a novel hierarchical design of an application-specific instruction set processor (ASIP) tailored for fast Fourier transformation (FFT), a kernel data transformation task in digital communication systems, to meet the stringent requirements on throughput and flexibility. We reconstruct the FFT computation flow into a scalable array structure based on an 8-point butterfly unit (BU)...
The design of the two-way real-time sampling circuit is completed by using TMS320VC5402 as main control chip, and two A/D-D/A converter chip TLV320AIC10 connected in master-slaver mode. The software is programmed by C in conjunction with assembly language, and is compact and efficient. The design of the module has highly practical value.
Various orthogonal frequency division multiplexing (OFDM)-based wireless communication standards have raised more stringent requirements on throughput and flexibility of fast Fourier transformation (FFT), a kernel data transformation task in communication systems. Application-specific instruction set processor (ASIP) has emerged as a promising solution to meet these requirements. In this paper, we...
Efficiently implementing complex voice enhancement algorithms on digital signal processor platforms is a challenging task. A wide scope of knowledge and skills to understand algorithm details, DSP architecture and instruction set, fractional number arithmetic, performance measurement and optimization are essential. In this paper, implementation aspects of the typical voice enhancement related algorithms...
In this paper, we have presented a talk-through application describing the basic significance of a software defined radio (SDR). We have shown the procedure to build in hardware a specific receiver to work with this application.
Detailed description is given connector principle of DSP (digital signal processor) chip TMS320VC5402 of HPI (host port interface). Communication with single chip computer is achieved using a 16 k dual port RAM within 5402 chip. The advantages of DSP high speed data processing and the parallel two-way communication are greatly enhanced by software design using a combination of C and compile language.
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