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Some researchers have recently showed that shellcode, a small piece of executable machine code, could be transformed into text. Although such shellcode-embedding text itself may elude defensive measures, due to the existence of a decoding routine attached the shellcode, it could be detected by them. In this paper, we propose a novel approach to building shellcode-embedding Korean text without a decoder...
In automotive electronics, the approach to integrate several existing single-core electronics control units into a multicore computer platform is now emerging. The integration may result in mixed-criticality systems where robust segregation between software applications is crucial. Another requirement for this process is the reusability of legacy software. Virtualization is a promising technique which...
Most of the work on VM network performance has focused so far on bulk TCP traffic, which covers classical applications of virtualization. Completely new “paravirtualized devices” (Xenfront, VIRTIO, vmxnet) have been designed and implemented to improve network throughput.
Binary translation is the emulation of one instruction set by another through translation of code. Sequences of instructions are translated from the source to the target instruction set. The semantic equivalence conversion of instructions is the core of a binary translation system. In order to simulate the behavior of a program on the target platform more accurately, the change of the special state...
In this paper, we describe a generic approach for integrating a dynamically reconfigurable device into a general purpose system interconnected with a high-speed link. The system can dynamically install and execute hardware instances of functions to accelerate parts of a given software code. The hardware descriptions of the functions (bitstreams) are inserted into the executable binary running on the...
As FPGA resources continue to increase, FPGAs present attractive features to the High Performance Computing community. These include the power-efficient computation and application-specific acceleration benefits, as well as tighter integration between compute and I/O resources. This paper considers the ability of an FPGA to address another, increasingly important, feature - resiliency. Specifically,...
The number of cores integrated onto a single die is expected to climb steadily in the foreseeable future. This move to many-core chips is driven by a need to optimize performance per watt. How best to connect these cores and how to program the resulting many-core processor, however, is an open research question. Designs vary from GPUs to cache-coherent shared memory multiprocessors to pure distributed...
Nuclear Power plants are built to last 40 years. From the beginning of their lifetime up to now, dozens of specific, but not critical, applications have been developed. Their cost does not only reside in the development but mainly in the qualification and validation processes. Most of the time, once these applications have been commissioned and have fulfilled their functions, no functional or performance...
PCI Express architecture is a widely used communication bus designed for industrial application. Additionally, according to PICMG 3.4 specification it is a part of ATCA architecture. One of the features offered by PCI Express standard is possibility of replacing the system components without shutting down entire system. In this paper, authors present general overview of Hot-Plug implementation in...
Chiamwongpaet and Piromsopa introduced secure canary word, an extension of secure bit, as an architectural approach to the protection against buffer-overflow attacks on non-control data (variables and arguments). Secure canary word is based on two existing schemes, secure bit and canary word. The objective of this paper is to propose a new hardware implementation in order to improve the efficiency...
Dynamic information flow tracking (DIFT) is a promising security technique. With hardware support, DIFT prevents a wide range of attacks on vulnerable software with minimal performance impact. DIFT architectures, however, require significant changes in the processor pipeline that increase design and verification complexity and may affect clock frequency. These complications deter hardware vendors...
The detectors of the CBM experiment, under construction at GSI, Germany, will generate an enormous data flow of 1TB/s, which is provided via approximately 6000 optical links to the DAQ system. For proper analysis, so called events have to be composed of data packets originating from different geometrical regions and with temporal coincidence, at a resolution of 1 nS. Routing and aggregating of packets...
Cross platform debugging can make the software debugging and hardware platform developing work simultaneity in embedded system development, which accelerates the development lifecycle dramatically. Reverse execution can run program backward to historic points, may provide programmers with a useful approach of fast locating the cause of the program failure. In this paper, we propose a reversible debugging...
Integrating real-time and general-purpose operating systems into a single embedded device is promising scheme to support both real-time responsiveness and rich functionality with reasonable engineering cost. However, even if the modification for a single combination of real-time and general-purpose operating systems is small, it would be problematic when considering combinations of various operating...
With the ever-increasing application of embedded systems in the field of industrial control, the demand for embedded configuration software becomes inevitable. This paper presents a general method of developing embedded configuration software based on embedded Linux operation system. The software architecture consisting of host and target is given out. The relationship between graphic-element classes...
Data races can occur even in sequential programs due to asynchronous software interrupts (e.g., UNIX signals). In this paper, we propose and implement a new tool DRACULA that dynamically detects data races caused by UNIX signals. DRACULA has many positive characteristics like full-automation, no source code required, high scalability, and synchronization mechanism independence, which make DRACULA...
An embedded system with complex embedded microprocessor inner resources and plentiful peripheral devices cannot work efficiently without the management of operating system. How to develop Boot Loader on the basis of the specific hardware platform is a key point and difficulty without question. The concept and function of embedded operating system booting program-Boot Loader which has multiple communication...
Adaptive computers combine conventional software programmable processors with reconfigurable compute units. We present techniques that allow the high-performance realization of demand-paged, virtually addressed main memory shared between both of these processing elements. Furthermore, we have achieved low-latency communication between software running on the CPU and the reconfigurable compute unit,...
Performance evaluation techniques for fundamental graphics algorithms and for algorithms to be used in multimedia and embedded systems are investigated. Models of computation considering only arithmetic and logic operations taken on input data are regarded as inadequate for processors with instruction-level parallelism. For experimental evaluation of graphics algorithms clock-cycle counting is found...
While memory-safe and type-safe languages have been available for many years, the vast majority of software is still implemented in type-unsafe languages such as C/C++. Despite massive concerted efforts by software vendors such as Microsoft to eliminate buffer overflow vulnerabilities through automated and manual code review, they continue to be found and exploited. We present a novel approach that...
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