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Making the data plane of a SDN flexible enough to satisfy the various requirements of heterogeneous IoT applications is very desirable for Software Defined IoT (SD-IoT) networking. The network device having programmable data plane provides an ability to add new packet and data processing procedures dynamically to the IoT applications. Previously proposed solutions for adding programmability to the...
The paper introduces the design of Modbus slave based on Modbus RTU over RS-485 and its implementation. By designing a new software architecture and embedded open stacks, development lifetime is shortened as well as the software is easy to port, maintain, and reuse. A new approach inspired from Modbus functionality makes it easier for developer to divide program into three tasks and synchronize them...
Renewable energy resources are becoming popular with mass adoption in residential and commercial applications because of gradual cost reduction along with continuous technical advancements. Photovoltaic (PV) energy is one of the biggest players of renewable energy installations although soft costs remain as a major barrier for higher penetration of PV systems. To significantly lower the soft costs...
This paper presents one solution for home automation software. Besides basic home automation functionalities like controlling and monitoring smart home devices, aim of this software is unified access and presentation of these devices to the user in an intuitive way based on concept of services. This concept also provides uniform cross component interaction inside the software.
Current I/O devices communicate based on the PCIe protocol, and by default, all the traffic passes through the CPU-memory complex. However, this approach causes bottleneck in system throughput, which increases latency and power as the CPU processes device specific protocols to move data between I/O devices. This paper examines the cost of this centralized I/O approach and proposes a new method to...
Cache coherence protocols limit the scalability of multicore and manycore architectures and are responsible for an important amount of the power consumed in the chip. A good way to alleviate these problems is to introduce a local memory alongside the cache hierarchy, forming a hybrid memory system. Local memories are more power-efficient than caches and do not generate coherence traffic, but they...
In order to dynamicly monitor and manage the working state of space science experiment payloads, the large volume of science data should be performed for real-time transmission. According to this requirement, the paper proposes a design scheme of main information network based on Ethernet. A microprocessor TMS320F2812 and the Ethernet interface chip KSZ8851 are applied to set up the Ethernet communication...
Upcoming telecommunication networks are expected to lower energy requirements of current infrastructures, especially at the network edge. That necessarily entails cutting off energy wasted when devices are active, yet idle, just to maintain their presence on the network. To this purpose, the concept of delegating network activity has been introduced to allow devices to enter low power states without...
We present the architecture and programming principles of Mordicus-hw, a C++ framework for distributed hardware control and configuration, designed to optimize collaborative development between electronics and software engineers. A use case is provided by the GET general-purpose data acquisition electronics for TPC detectors.
Automotive systems comprise a high number of networked safety-critical functions. Any design changes or addition of new functionality must be rigorously tested to ensure that no performance or safety issues are introduced, and this consumes a significant amount of time. Validation should be conducted using a faithful representation of the system, and so typically, a full subsystem is built for validation...
Unit testing aims to ensure that methods correctly implement the specified and implied pre- and post-conditions, while integration testing ensures that modules correctly follow interaction protocols. While the generation of unit test cases has been explored extensively in the literature, there is still little work on the generation of integration test cases. In this paper we present a new technique...
Cache coherence protocols limit the scalability of chip multiprocessors. One solution is to introduce a local memory alongside the cache hierarchy, forming a hybrid memory system. Local memories are more power-efficient than caches and they do not generate coherence traffic but they suffer from poor programmability. When non-predictable memory access patterns are found compilers do not succeed in...
Current High-Frequency Trading (HFT) platforms are typically implemented in software on computers with high-performance network adapters. The high and unpredictable latency of these systems has led the trading world to explore alternative "hybrid" architectures with hardware acceleration. In this paper, we survey existing solutions and describe how FPGAs are being used in electronic trading...
Fuzzing is one of the most popular test-based software vulnerability detection techniques. It consists in running the target application with dedicated inputs in order to exhibit potential failures that could be exploited by a malicious user. In this paper we propose a global approach for fuzzing, addressing the main challenges to be faced in an industrial context: large-size applications, without...
The ARM® processor family is the most widely used 32-bit processor family, and has consistently included debug features, starting from the ARM7TDMI® processor [1]. Embedded debug forms part of the ARMv7 architecture [2]. The most recent addition to the ARM architecture family is ARMv8 [3], which represents the biggest change in the architecture's history. This paper looks at the impact of the new...
Simulation-based functional verification is the key validation methodology the industry. The performance of logic simulators, however, is not sufficient to attain acceptable verification coverage on large industrial designs within the time-frame available. Acceleration platforms are a valuable addition to the verification effort in that they can provide much higher coverage in less time. Unfortunately,...
In this paper we explore a SystemC-based hardware design method which uses aspect-oriented programming concepts. We have designed a synthesizable resource scheduler at register transfer level by using only features available in the SystemC synthesizable subset. The results show that aspect-oriented programming applied to digital hardware design provides a better separation of concerns at the cost...
Article describes simulation application for automatic managing lights devices on the stage. There are described all technologies and protocols necessary for application development. MIDI messages are input information and as an output serves Pulse width modulation. A managing tension is the result of Pulse width modulation. A managing tension directs electrical devices via transformation interfaces...
This paper presents a design method of three point temperature acquisition system based on Ethernet. and described the hardware and software design of system in detail. the hardware section mainly describes the principle and use of Ethernet controler DM9000A which is widely used in industry. The software part represents the structure and transplant of the open source TCP / IP protocol stack uIP 1...
This paper illustrates the use of software for monitoring and recording the effects of electrostatic discharge (ESD) on the operation of embedded systems, with the goal of facilitating root-cause analysis of resulting failures. Hardware -- based scanning techniques are typically used for analyzing the effect of ESD on systems by identifying physical coupling paths. This paper proposes software techniques...
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