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The paper introduces the design of Modbus slave based on Modbus RTU over RS-485 and its implementation. By designing a new software architecture and embedded open stacks, development lifetime is shortened as well as the software is easy to port, maintain, and reuse. A new approach inspired from Modbus functionality makes it easier for developer to divide program into three tasks and synchronize them...
The hardware design of Godson-3A processor adopts the scalable distributed multi-core structure which is based on a 2D mesh. It can make use of multi-chip interconnection to construct a unified topology structure for board level or system level. This kind of interconnected system can't achieve entirely by hardware design, and it also needs the reasonable design of the BIOS and upper software. As the...
The Aeroflex UT699 LEON 3FT RHBD microprocessor was tested for SEE. Testing showed the UT699 is sensitive to a register SEE above LET = 10 MeV-cm^2/mg which is of limited impact due to a space rate of approximately 5E-6/device-year. This is on the same order of magnitude with earlier SEE rates predicted from FF upsets. Results were also collected for SpaceWire ports, Watchdog circuitry, SRAM elements...
Organizations of Geographic Information Standardization have ignored the development of management of Geographic Information Services. Thus, different GIS software vendors have implemented their own service management approaches and have not provided a unified interface, which brings many difficulties to users in using, integration, dynamic management, etc. In this context, a specification to manage...
Pure software simulators are too slow to simulate modern complex computer architectures and systems. Hybrid software/hardware simulators have been proposed to accelerate architecture simulation. However, the design of the hardware portions and hardware/software interface of the simulator is time-consuming, making it difficult to modify and improve these simulators. We here describe the Simulation...
Many conferences have been regularly organized worldwide each year. The organizing process consists of sequences of major activities involving several distant participants. The characteristic of the conference management process, therefore, suits the solution of distributed system. To enhance loose coupling, the cooperative activities could be implemented as services. However, the orchestration of...
This paper presents a detailed analysis of the efficiency of software-only techniques to mitigate SEU and SET in microprocessors. A set of well-known rules is presented and implemented automatically to transform an unprotected program into a hardened one. SEU and SET are injected in all sensitive areas of MIPS-based microprocessor architecture. The efficiency of each rule and a combination of them...
This paper proposes a fast and efficient multi-processor architecture for devices a requiring high speed performance. The proposed method connects four basic processor modules (BPM) including CPU's in a pipeline shape to enhance execution speed. Also, using a specific BPM selectively regarding to multimedia applications increases the efficiency, and has more flexibility by software implementation...
For embedded systems, where neither energy nor reliability can be easily sacrificed, this paper presents an energy efficient soft error protection scheme for register files (RFs). Unlike previous approaches, the proposed method explicitly optimizes for energy efficiency and can exploit the fundamental tradeoff between reliability and energy. While even simple compiler-managed RF protection scheme...
Most reconfigurable processors are not fully controlled by software; they are reconfigured using hardware description languages. By moving the data paths into the processor, the system architect can discard the external control logic, the finite state machines and micro-sequencers. Examples for such a processor are the members of the Stretch family, Software Configurable Processors which have a reconfigurable...
A recent work has presented the design and implementation of a software library, named DyMeLoR, supporting transparent log/restore facilities for optimistic simulation objects with generic memory layout. This library offers the possibility to allocate/deallocate memory chunks via standard API, and performs log/restore of the object state via pack/unpack techniques,exploiting ad-hoc meta-data concisely...
Adaptive systems are set to become more mainstream, as numerous practical applications in the communications domain emerge. FPGAs offer an ideal implementation platform, combining high performance with flexibility. While significant research has been undertaken in the area of FPGA partial reconfiguration, it has focussed primarily on low-level architecture-specific implementations. Building upon this...
Test automation is facing a new challenge because tools, as well as having to provide conventional test functionalities, must be capable to interact with ever more heterogeneous complex systems under test (SUT). The number of existing software interfaces to access these systems is also a growing number. The problem cannot be analyzed only from a technical or engineering perspective; the economic perspective...
In this paper we introduce the idea of integrating high security level services to support law enforcement with high-tech crime investigation. We take advantage of a process-oriented approach to model the interaction between services according to SOA principles. This approach, called static integration, is sufficient for a broad area. In a homeland security environment, however, the situation poses...
Binary translation (BT) has been an important approach to migrate application software across instruction set architectures (ISAs). Some architectures, such as X86, allow misaligned data accesses (MDAs), while most modern architectures have the alignment restriction that requires data to be aligned in memory on natural boundaries. In a binary translation system, where the source ISA allows MDA and...
The architectural vulnerability factor (AVF) of a hardware structure is the probability that a fault in the structure will affect the output of a program. AVF captures both microarchitectural and architectural fault masking effects; therefore, AVF measurements cannot generate insight into the vulnerability of software independent of hardware. To evaluate the behavior of software in the presence of...
Violations in memory references cause tremendous loss of productivity, catastrophic mission failures, loss of privacy and security, and much more. Software mechanisms to detect memory violations have high false positive and negative rates or huge performance overhead. This paper proposes architectural support to detect memory reference violations in inherently unsafe languages such as C and C++. In...
With the ever-increasing application of embedded systems in the field of industrial control, the demand for embedded configuration software becomes inevitable. This paper presents a general method of developing embedded configuration software based on embedded Linux operation system. The software architecture consisting of host and target is given out. The relationship between graphic-element classes...
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