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In a network system, a propagated failure (PF) is a failure originating from a network component that can cause extensive damages to other network components or even the failure of the entire system. Existing works on PFs have mostly assumed the deterministic effect from a component PF, i.e., a fixed subset of system components is affected whenever the PF occurs. However, in many real-world systems,...
The current research on the reliability of metal oxide semiconductor field effect transistor (MOSFET) mostly focuses on its failure mechanisms and failure modes. There is less research based on the characteristic parameters of MOSFET's degradation to predict its reliability and remaining useful life (RUL). Further, relevant test equipment is not mature. Therefore, it is very meaningful to design an...
The security of industrial control systems has been a big topic by the Stuxnet case in 2010. As a solution which can solve these requirements, data diode has emerged. A data diode is a computer security device that restricts the communication along a network connection between two computers so that data can only be transmitted in one direction. This enables a more sensitive or highly classified computer...
Millivolt switches will not only improve energy efficiency, but will enable a new capability to manage the energy-reliability tradeoff. By effectively utilizing this system-level capability, it may be possible to obtain one or two additional generations of scaling beyond current projections. Millivolt switches will enable further energy scaling, a process that is expected to continue until the technology...
In the field of reliability and safety, Fault-tree analysis proved to be a useful analytic tool. Aimed at static or dynamic FTs, Monte Carlo simulation based on time-to-failure (TTF) may be an effective way to calculate FTs. Through computing the TTF of bottom events of FTs, the TTF of the system can be calculated easily. However, Monte Carlo simulation based on TTF is time-consuming because modern...
There are many risks for computers in network. However most risks can not be solved, managing of risks is appropriate approach to empower the computers. Every developer need to an appropriate approach for managing threaten risks for computers. In this paper, a new approach for risk management base on polling system is presented. Management of risks includes recognition of assets and evaluation of...
Computer-aided FTA theory has been expounded. a new method using linked-list for fault tree qualitative analysis algorithm and applying transfer-event for the NP problem of fault tree quantitative analysis is presented in this paper. the transfer-event has been applied to solve the drawing and outputting of large-scale fault tree. Based on windows interface a design and implementation method of computer...
Computational thinking (CT) does not require profound knowledge of computer science (CS). Vice versa, it helps students organize and build up new knowledge around the core CS concepts they encounter on the daily basis. Furthermore, CT provides a set of problem-solving skills and enhances analytical abilities that are crucial for the young generation to succeed in modern world pervaded with technology...
This paper proposes an algorithm for the reliability analysis of multi-state systems with multiple dependent trigger components subject to competing failure propagation and failure isolation events. Propagated failure from a system component causes failures of other system components. However, the effect of a propagated failure is not deterministic in systems with functional dependence behavior. Failure...
This paper presents an algebraic approach allowing to perform the analysis of any Dynamic Fault Tree (DFT). This approach is based on the ability to formally express the structure function of DFTs. We first present the algebraic framework that we introduced to model dynamic gates and hence be able to determine the structure function of DFTs. Then, we show that this structure function can be rewritten...
We introduce implementations of arithmetic operators based on the binary stored-carry-or-borrow (BSCB) representation. Several BSCB arithmetic elements, including full-adder, ripple-carry adder, and carry-lookahead adder are presented, followed by detailed design of an array multiplier. In the latter design, the conventional initial AND matrix is transformed and expressed with a redundant radix-2...
Traditional fault tree analysis method need obtain exact value of the event occurrence's probability, un-completeness and fuzziness of the data is ignored. Fuzzy fault tree analysis method is proposed in study on the system reliability. The fuzzy fault tree of the AUV is established. Using operational rule calculated the fuzzy probability of the top event which is AUV can't work normally and analysis...
In this paper, the traditional method of fault tree analysis is briefly introduced. AUV, whose fault tree was built, did not work normally as top event. Using Monte-Carlo random sampling method, we establish the simulation model of the AUV, set up the Fault Tree Analysis simulation MATLAB program and engage in its fault tree quantitative analysis. The life distribution function of the AUV system is...
This paper presents principles and results of dynamic testing of an SRAM-based FPGA using time- resolved fault injection with a pulsed laser. The synchronization setup and experimental procedure are detailed. Fault injection results obtained with a DES crypto-core application implemented on a Xilinx Virtex II are discussed.
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient errors during system operation are no longer restricted to memories but also affect random logic, and a robust design becomes mandatory to ensure a reliable system operation. Self-checking circuits rely on redundancy to detect...
Process scaling is well know to increase overall chip-level soft error rates (SER) if no additional mitigation techniques are applied [Seifert04]. The purpose of this study is to summarize recent investigations conducted by the author to characterize the SER benefits and limitations of one particular SER mitigation technique: radiation hardened sequentials that utilize local redundancy. The studied...
In this paper a BISR architecture for embedded memories is presented. The proposed scheme utilises a multiple bank cache-like memory for repairs. Statistical analysis is used for minimisation of the total resources required to achieve a very high fault coverage. Simulation results show that the proposed BISR scheme is characterised by high efficiency and low area overhead, even for high defect densities...
This paper presents an efficient high-level synthesis (HLS) approach to improve RT-level concurrent testing. The proposed method used for both fault detection and fault location. At first the available resources are used in their dead intervals to test active resources for fault detection, and then some changes are applied to the RT-level controller to locate the faults. The fault detection step is...
Built-in self test (BIST) and built-in self repair (BISR) techniques have been developed for memory blocks in recent years. Such techniques are suited to enhance production yield, but also to facilitate long-term dependable circuits though self repair in the field of application. BISR for logic circuits has shown to be much more complex, for which only a few approaches have been published so far....
Low-cost wireless routers are changing the way people connect to the Internet. They are also very cheap, albeit quite limited, Linux boxes. These attributes make them ideal candidates for wireless mesh routers. This paper presents a minimally invasive mechanism for redundant multipath routing in kernel-space to achieve high reliability with high throughput in a mesh network. This service is essential...
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