The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Lots of studies have shown that memory hardware error rates are orders of magnitude higher than previously reported. In order to fight with these memory hardware errors, many memory testing tools have been developed, especially software level online memory testers, which means these memory testers implemented in software can work with the OS (operating system) at the same time. However, validation...
The replacement of DRAM with non-volatile memory relies on solutions to resolve the wear leveling and slow write problems. Different from the past work in compiler-assisted optimization or joint DRAM-PCM management strategies, we explore a light-weighted software-controlled DRAM cache design for the non-volatile-memory-based main memory. The run-time overheads in the management of the DRAM cache is...
Memory error protection is increasingly important as memory density and capacity continue to scale. This paper presents a memory SEP (Selective Memory Protection) design that enables SEP for commodity memory modules, with no change to the modules or devices. Memory error protection is provided through embedded ECC, a recently proposed, energy-efficient ECC memory organization. The memory SEP design...
Memory system reliability is increasingly a concern as memory cell density and capacity continue to grow. The conventional approach is to use redundant memory bits for error detection and correction, with significant storage, cost and power overheads. In this paper, we propose a novel, system-level scheme called MemGuard for memory error detection. With OS-based checkpointing, it is also able to recover...
Lately researches are going on to combine both cryptography and biometric systems for more reliability and security of a system. It can be accomplished using fuzzy vault technique. Fuzzy vault stores the secret key. Unlocking phase of fuzzy vault is based on construction of polynomial over a finite field system GF(2n). As the size of a key increases, the time taken for construction of polynomial increases...
Utilizing a heterogeneous multiprocessor system has become a popular design paradigm to build an embedded system at a cheap cost. A reliability issue, which is vulnerability to single event upsets (SEUs), has not been taken into account in a conventional IC (integrated circuit) design flow, while chip area, performance, and power consumption have been done. This paper presents a system design paradigm...
Guaranteeing the underlying reliability of computer memory is becoming more difficult as chip dimensions scale down, and as power limitations make lower voltages desirable. To date, the reliability of memory has been seen as the responsibility of the computer engineer, any underlying unreliability being hidden from programmers. However it may make sense, in future, to shift this balance, optionally...
More and more theories are used in equipment maintenance, what is the relation between them? How to use them integrally? What is the future trend of maintenance theory development? All questions can get answer for paper. Based on the Value Stream Analysis (VSA), inherit ldquovaluerdquo relation of Time-Based Maintenance (TBM), Reliability-Centered Maintenance (RCM) and Re-Manufacture (RM) Engineering...
This paper presents principles and results of dynamic testing of an SRAM-based FPGA using time- resolved fault injection with a pulsed laser. The synchronization setup and experimental procedure are detailed. Fault injection results obtained with a DES crypto-core application implemented on a Xilinx Virtex II are discussed.
The problem of detection of control flow errors in software has been studied extensively in literature and many detection techniques have been proposed. These techniques typically have high memory and performance overheads and hence are unusable for real-time embedded systems which have tight memory and performance budgets. This paper presents two algorithms by which the overheads associated with...
In this paper a BISR architecture for embedded memories is presented. The proposed scheme utilises a multiple bank cache-like memory for repairs. Statistical analysis is used for minimisation of the total resources required to achieve a very high fault coverage. Simulation results show that the proposed BISR scheme is characterised by high efficiency and low area overhead, even for high defect densities...
In this paper we present a low cost fault-tolerant attitude determination system to a scientific satellite using COTS devices. We related our experience in developing the attitude determination system, where we combine proven fault tolerance techniques to protect the whole system composed only by COTS from the effects produced by transient faults. We detailed the failure cases and the detection, reconfiguration...
Soft errors induced by cosmic radiation have become an urgent issue for ultra-deep-sub-micron (UDSM) technologies. In this paper, we propose a new radiation hardened by design latch (RHBDL). RHBDL can improve robustness by masking the soft errors induced by SEU and SET. We evaluate the propagation delay, power dissipation and power delay product of RHBDL using SPICE simulations. Compared with existing...
Low-cost wireless routers are changing the way people connect to the Internet. They are also very cheap, albeit quite limited, Linux boxes. These attributes make them ideal candidates for wireless mesh routers. This paper presents a minimally invasive mechanism for redundant multipath routing in kernel-space to achieve high reliability with high throughput in a mesh network. This service is essential...
Several vulnerability analysis techniques in web-based applications detect and report on different types of vulnerabilities. However, no single technique provides a generic technology-independent handling of Web-based vulnerabilities. In this paper we present our experience with and experimental exemplification of using the application vulnerability description language (AVDL) to realize a unified...
In this paper, we introduce and evaluate ScaleMesh, a scalable miniaturized dual-radio wireless mesh testbed based on IEEE 802.11b/g technology- ScaleMesh can emulate large-scale mesh networks within a miniaturized experimentation area by adaptively shrinking the transmission range of mesh nodes by means of variable signal attenuators. To this end, we derive a theoretical formula for approximating...
3D contactless technology based on capacitive coupling represents a promising solution for high-speed and low power signaling in vertically integrated chips. AC coupled interconnects do not suffer from mechanical stress, and the parasitic load is much reduced when compared to standard DC solutions, such as wire bonding and micro bumps. Communication system based on wireless interconnection scheme...
As digital resources increasingly growing and the economic benefit of digital intellectual property rights being increasingly important, people has been increasingly emphasis on information security issues brought by the data remnants in storage devices. They try their best to prevent the potential risks. In this paper, we survey comprehensively related technologies, standards and trends of erasure,...
This paper introduces a novel approach for iris segmentation. In detecting the inner boundary of the iris, the method introduces a circular filter which is specially designed to detect circular shapes in images. The inner boundary detection process consists of two steps. Firstly, a coarse circle of the pupil is detected by the proposed circular filter after a binarization to the input iris image....
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.