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ICx Radiation, Inc. has implemented a novel timing method for use in a Compton telescope that is capable of nanosecond timing resolution. A critical task in Compton telescope design is to minimize the timing variance between detectors in a large array in order to reduce the background. The voxelSPEC has been developed to combine precise timing with pulse processing electronics in a single device,...
The successful operation of Networked Control Systems (NCS) requires employing appropriate approaches for dealing with network induced time delays, i.e. time intervals elapsed from consecutive sampling and actuation operations. Effective approaches often require to impose periodic execution for the sampling and/or actuation operations, enforcing synchronized constant time delays. And considering that...
Between the wired and the wireless world a synchronization gap in terms of accuracy obviously exists due to the different possibilities of the technologies. This paper investigates means to access WLAN functionality in order to gain system-wide synchronization between access points and clients in order to establish a common notion of time in IEEE 802.11 systems. For this, a novel approach is presented,...
Using IEEE 1588 for highly accurate clock synchronization between nodes of a distributed system has become a widely accepted approach. IEEE 802.3/Ethernet is frequently utilized as communication layer to exchange the Precision Time Protocol (PTP) messages specified in the IEEE 1588 standard. 10/100/1000 MBit Ethernet communication is commonly used by now. In contrast, fiber optics based 10 GBit Ethernet...
Power electronic converters used in distributed power generation systems need grid synchronization systems. These synchronization methods can be divided into two fundamental parts. Whereas the first part proposes detecting grid signal sequences and harmonics, the second one is based on a PLL (Phase Locked Loop). DSC (Delay Signal Cancellation) y DSOGI-QSG (Dual Second Order Generalized Integrator-Quadrature...
The research is devoted to investigate about the coordination in the time domain of the operations executed by the Measurement Instruments (MIs) connected by Hardware Interface (HI) to the node of the Distributed Measurement System. A new architecture of HI is proposed to trigger the MI. The new HI (i) avoids the random effects of concurrency of the software processes running on PC, (ii) reduces the...
It requires accurate synchronization among the MCU, servo controllers and sensors in CNC systems for time stamping of data and motion control. This paper presents the design and implementation of time synchronization for CNC systems which employ switched Ethernet as its communication module. The method adopts the clock of switches as the master clock instead of that of MCU which usual is. To obtain...
In various CNC systems the MCU, servo controllers and sensors all need to be accurately synchronized for time stamping of data and motion control. This paper presents a time synchronization method for CNC systems based on switched Ehternet in which message delay variation through switches must be minimized or compensated to obtain accurate time synchronization. The method uses the switch as the time...
When using network synchronization protocols like IEEE 1588 or NTP, a common approach to increase the performance is to add hardware support for timestamping the essential synchronization messages. Further, timestamping accuracy and the stability of the local oscillator of a network synchronized node are the two main influence factors for high accuracy clock synchronization. While the latter is subject...
Clock synchronization is one of the enabling technologies for real-time networking. This paper is motivated by the need for WLAN support of real-time factory automation networks. These networks need synchronized clocks for the typical time-slotted arbitration schemes. As this type of service is not yet available wireless LANs, this work investigates possibilities for synchronizing clocks, based on...
This paper presents test results from several IEEE1588 Transparent Clocks (TC) under realistic network conditions. Imperfections are documented that may impact the end-to-end synchronization performance between Master Clocks (MC) and Slave Clocks (SC). To help service providers select and configure these devices to meet their synchronization performance needs, a new test methodology for characterizing...
On-chip many core architecture is an emerging and promising computation platform. High speed on-chip communication and abundant chipped resources are two outstanding advantages of this architecture, which provide an opportunity to implement efficient synchronization scheme. The practical execution efficiency of synchronization scheme is critical to this platform. However, there are few researches...
In this paper, we present a selective time synchronization algorithm (STSA) based-on two selective switches using a hardware timestamp at a low-level layer to reduce time synchronization errors over Ethernet, and give the improved formula to calculate the time offset when considering the frequency offset factor in SNTP. The STSA transmits frame-based time synchronization frame on a truncated constant...
Virtualization provides the possibility of whole machine migration and thus enables a new form of fault tolerance that is completely transparent to applications and operating systems. While initial prototypes show promise, virtualization-based fault-tolerant architecture still experiences substantial performance overhead especially for data-intensive workloads. The main performance challenge of virtualization-based...
Pseudo-noise (PN) sequence is widely used in wireless transmission systems for synchronization, which is usually performed via cross-correlation, i.e. PN correlator, between the received signal and a locally generated PN sequence. However, the hardware implementation of such a correlator becomes the inhibiting bottleneck of integration due to the long tapped-delay line, particularly in the case of...
In the recent past we have seen open standards based data acquisition and telemetry systems supplant proprietary systems. Asynchronous Transfer Mode (ATM) was a great choice for sonar and related synchronous sampling systems as the network was built on the concept of a synchronous backbone from which system timing could be derived. Unfortunately for all but the largest of backbones, ATM has been replaced...
For successful data delivery, the destination nodes should be listening to the medium to receive data when the sender node starts data communication. To achieve this synchronization, there are different rendezvous schemes, among which the most energy-efficient is utilizing wakeup receivers. Current hardware technologies of wake-up receivers enable us to evaluate them as a promising solution for wireless...
The conventional matched filter structures are investigated in this paper. An acquisition circuit based on the polyphase form matched filter in Global Positioning System (GPS) receiver is provided. At the cost of less hardware resource, the significant advantage in the speed of synchronization is offered. For 32??128 polyphase form matched filter, the critical path delay approximately reduces 1/2,...
We present a distributed clock synchronization algorithm that guarantees an exponentially improved bound of O(log D) on the clock skew between neighboring nodes in any graph G of diameter D. In light of the lower bound of Omega(log D/ log log D), this result is almost tight. Moreover, the global clock skew between any two nodes, particularly nodes that are not directly connected, is bounded by O(D),...
Version 2 of IEEE 1588 contains an extension to secure the given service of clock synchronization. This article describes a practical implementation of this extension for a clock synchronization network. Pitfalls also relevant to other implementations and important properties are discussed and performance results that cover normal operation and stress tests such as denial of service attacks are presented...
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