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Coming with the reliability enhancement and the life extension for the Photovoltaic (PV) inverters modules, diagnostic techniques will be required to derive signature identification. The reliable operation of PV inverter is very crucial to get the highest performance for the long term. A new Smart Inverter Robustness Index (SIRI) is used for verifying the performance and robustness of the grid-tied...
This paper deals with partial discharge measurements carried out on specimens of Type I and Type II insulation systems for rotating machines. Partial discharge (PD) patterns under sinusoidal and repetitive impulse voltage, considering two level and five level inverters, are presented showing that phenomenology is deeply different, but that increasing the number of inverter steps, PD patterns closer...
Physical Unclonable Functions (PUFs) is one of the popular security primitives for IC which is mainly used for identification and cryptographic application. Although various environmental parameter affect its performance but aging causes permanent degradation in its reliability. This paper presents a modified aging tolerant architecture for ring oscillator based PUF (RO-PUF) in which the conventional...
Inverters are one of the most basic logic blocks and exhibit a strong temperature dependency. Additionally, degradation in CMOS transistors affects the performance of circuits over time and is strongly dependent on temperature during circuit operation. In order to design robust and reliable ring oscillators and time to digital converters, both temperature dependencies have to be considered. This work...
Ring oscillators exhibit a strong temperature dependency. Additionally, degradation in CMOS transistors affects the performance of circuits over time and is strongly dependent on temperature during circuit operation. In order to design robust and reliable ring oscillator-based circuits, both temperature dependencies have to be considered. This work introduces systematic analyses on temperature dependencies...
The simulation of aging related degradation mechanisms is a challenging task for timing and reliability estimations during all design phases of digital systems. Some good approaches towards accurate, efficient and applicable timing models at the register transfer level (RTL) have already been made. However recent state-of-the-art models often have to access lower levels of abstraction, such as the...
Long-mission multiprocessor systems in which direct human intervention is impossible, like satellites in space, require special attention of their lifetime reliability. Relying on the well established power reduction techniques which are frequently used in multiprocessors - power and clock gating, as well as dynamic voltage and frequency scaling, we devise the Youngest-First Round-Robin (YFRR) core...
SRAM Physical Unclonable Function (PUF) makes use of efficient silicon fabrication process where duplication of exact replica devices is difficult. One of the major issues with SRAM-PUF is the reliability and uniformity of the start-up pattern with environmental fluctuations. This paper presents a technique for improving uniformity (distribution of 1′s & 0′s) and reliability (variations in power-up...
The prospect of system failure has increased because of device and chip-level effects in the late CMOS era. In this article, the authors present novel system-level architecture and design innovations to cope with these lifetime reliability challenges. At nanometer-scale geometries, several hardware failure mechanisms, which were largely benign in the past, are becoming visible at the system level...
In this paper, physics-based IGBT and diode models are used to simulate two 3-phase VSI systems using different power modules in SABER. The device parameters for two standard SEMIKRON power modules, the 1200 V/75 A single chip module and the 1200 V/300 A multi-chip module, are extracted following parameterization procedure. The effects of three typical degradations are considered, including solder...
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