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We modeled the electrostatic doping in multilayer graphene interconnects by self-consistently solving Poisson's equation and we computed the resistivity per layer by accounting for acoustic and optical phonon scattering. For the analysis, we used two different doping concentrations, representative for graphene on top of hexagonal Boron Nitride and SiO2 substrates. Finally, we benchmarked graphene...
Simulator accuracy is an important, but seldom examined, part of study on 3D integration. This paper examines inaccurate technology parameters as a source of error for the CACTI and PRACTICS cache simulation tools. By replacing the default parameters with ones derived from information made available in the literature, CACTI simulation error for the 90 nm Itanium2 L3 cache is eliminated almost entirely...
Timing driven physical design, synthesis, and optimization tools need efficient closed-form delay models for estimating the delay associated with each net in an integrated circuit (IC) design. The total number of nets in a modern IC design has increased dramatically and exceeded millions. Therefore efficient modeling of interconnection is needed for high speed ICpsilas. This paper presents an closed-form...
<para> Interconnect RC delay, predominantly affected by the effective dielectric constant (k-value) and by the copper resistivity ( ), is an important performance metric for back-end-of-line (BEOL) process assessment. As process technology scales, interpretation of fundamental process-induced RC delay variations becomes a challenge as the relative importance of statistical process-induced...
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