We report the electrical transport of the Si nanowires in a field-effect transistor (FET) configuration, which were synthesized from B-doped p-type Si(111) wafer by an aqueous electroless etching method based on the galvanic displacement of Si by the reduction of Ag + ions on the wafer surface. The FET performance of the as-synthesized Si nanowires was investigated and compared with Ag-nanoparticles-removed Si nanowires. In addition, high-k HfO 2 gate dielectric was applied to the Si nanowires FETs, leading to the enhanced performance such as higher drain current and lower subthreshold swing.