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The presence of different noise sources and continuous increase in crosstalk in the deep submicrometer technology raised concerns for on-chip communication reliability, leading to the incorporation of crosstalk avoidance techniques in error control coding schemes. This brief proposes joint crosstalk avoidance with adaptive error control scheme to reduce the power consumption by providing appropriate...
Dynamic Thermal Management (DTM) emerged as a solution to address the reliability challenges with thermal hotspots and unbalanced temperatures. DTM efficiency is highly affected by the accuracy of the temperature information presented to the DTM manager. This work aims to investigate the effect of inaccuracy caused by the deep sub-micron (DSM) noise during the transmission of temperature information...
Dynamic Thermal Management (DTM) emerged as a solution to address the reliability challenges with thermal hotspots and unbalanced temperatures. DTM efficiency is highly affected by the accuracy of the temperature information presented to the DTM manager. This work aims to investigate the effect of inaccuracy caused by the deep sub-micron (DSM) noise during the transmission of temperature information...
High cost of qualifying library standard cells on silicon wafer limits the number of test circuits on the test chip. This paper proposes a technique to share common load circuits among test circuits to reduce the silicon area. By enabling the load sharing, number of transistors for the common load can be reduced significantly. Results show up to 80% reduction in silicon area due to load area reduction.
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