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High Efficiency Video Coding (HEVC) is the new video compression standard. A novel optimized architecture of Integer Motion Estimation (IME) for HEVC processing 8K video is presented in this paper. This architecture achieves 8K (7680×4320) video in real time at 43 fps (frames per second) with a frequency of 142 MHz and a latency of 402 clock cycles. The proposed design has been synthesized and simulated...
A novel architecture of Integer Motion Estimation (IME) for High Efficiency Video Coding (HEVC) processing 8K video is presented in this paper. This architecture achieves 8K (7680×4320) video in real time at 45 fps (frames per second) with frequency of 96.4 MHz and latency of as low as 260 clock cycles. The proposed design has been implemented by Xilinx ISE 13.1 using Virtex-7 28nm technology.
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