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In reconfigurable power amplifiers (PAs), the efficiency can be improved by dynamically switching the discrete gain mode according to the input envelope amplitude. Nevertheless, discontinuities that occur between gain mode changes critically compromise the linearization capability of traditional digital baseband predistorters (DPDs) based on continuous polynomials with memory. To circumvent such drawback,...
A 10-bit single-channel SAR ADC is designed in a 130nm CMOS technology. An original DAC is proposed, merging a binary-weighted structure and a C/2C topology in order to reduce overall energy consumption. A built-in calibration circuit improves the conversion accuracy. The proposed SAR ADC samples at 6.66MHz, achieving a SNDR of 49.78 dB for a 1MHz input signal (ENOB of 8 bits). The simulated INL is...
This work proposes an inductorless wideband low noise amplifier (LNA) for multistandard applications. This LNA is based on a self-biased complementary current-reuse common source amplifier on the forward path and a source follower on the feedback, using a gyrator-C like effect to create real valued impedance and an inductive effect, achieving wideband input matching. Designed in IBM 130 nm CMOS process,...
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