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As technology scales down, an increasing number of transistors can be integrated into a single chip but process variation becomes more serious. SRAM is one of the key components in a SoC and it occupies a large portion of the SoC. Thus, the SRAM bitcell is typically designed using very small transistors for high integration, which limits the minimum operating voltage (VCCmin) of the SoC because of...
A fully integrated variable gain amplifier circuit is reported in this paper. The amplifier is based on an integrating topology allowing the gain to be controlled by the timing of a clock signal. The recording of physiological signals such as the electroneurogram (ENG) or electromyogram (EMG) is a targeted application. Therefore, low-noise performance and low power consumption are important. Simulated...
Embedded memories are widely used in low power System-on-Chip (SoC) applications. Low power performance can be optimized with process, circuits, architecture and system level co-development. In this paper, low power design considerations are described in advanced technology nodes to address memory leakage and active power dissipation. Memory bit cell design in context of process technology definition,...
In a three-dimensional integrated circuit (3D IC) design, through-silicon-vias (TSVs) are used for data transfer across layers. However, TSVs act as obstacles during the stage of placement and routing and have a negative impact on chip yield. Therefore, TSV number minimization is an important topic for 3D IC design. In this paper, we point out that there often exist idle functional units and idle...
In this paper, DC and AC performance of junctionless MOSFETs are extensively examined. A comparison is made between double-gate junctionless MOSFETs and conventional inversion-mode MOSFETs with an emphasis on the variability in performance. Despite clear benefits by eliminating junctions and related junction variabilities, junctionless MOSFETs are found to require double- or multi-gate in order to...
As feature sizes decrease, soft errors are expected to become the dominant failure mechanisms for integrated circuits. This paper discusses the challenges that design and reliability engineers will face with the manufacture and test of ICs at advanced technology nodes.
In this paper, an IgE antigen concentration measurement system using a frequency-shift readout method for a two-port FPW (flexural plate-wave) allergy biosensor is presented. The proposed frequency-shift readout method adopts a peak detecting scheme to detect the resonant frequency. A linear frequency generator, a pair of peak detectors, two registers, and an subtractor are only needed in our system...
Embedded flash memory technology has undergone tremendous growth of demands with various performance requirements driven by expanded applications of MCU (Micro Controller Unit) products. High temperature operations with highest reliability for auto-motive applications, very low power embedded EEPROM functions for smart-cards, and ultra low-voltage operations for medical applications are driving factors...
Channel hot-carrier (CHC) degradation becomes more critical as the channel length is reduced. In general, CHC degradation is evaluated using DC stress applying both gate and drain bias. However, in the case of p-channel MOSFETs, negative bias temperature instabilities (NBTI) also degrades threshold voltage (VTH) and saturation drain current (Isat) under DC stress applying gate bias. Therefore, CHC...
Lanthanum (La), which has been used in recent works to tune the threshold voltage of HfSiO high-κ n-MOSFETs, is shown to introduce a new bulk degradation mechanism. Unlike the conventional charge trapping mechanism which exhibits low activation energy (~0.05 eV) and fast post-stress recovery, the La induced degradation mechanism is found to be relatively permanent and has higher activation energy...
A simple and low cost logic based single poly Flash memory technology, NeoFlash®, with fast programming and high reliability is demonstrated in this paper. Programming with channel hot-hole-induced hot-electron injection and erasure with uniform channel Fowler-Nordheim tunneling are utilized to achieve fast programming, high endurance and good reliability characteristics. Owing to its simple cell...
As the widening of process variability in submicron CMOS technology calls for accurate timing models, their deployment requires well-controlled characterization techniques to cope with the complexity and scalability. In this context, model order reduction techniques have been used extensively to reduce the complexity of extracted interconnect circuits and to expedite fast and accurate circuit simulation...
Recent OpenGL ES 2.0 API Specification for embedded systems graphics operations requires programmable vertex shader and fragment shader to process vertex and pixel data. Calculation of dot-product for two vectors and transcendental functions for a scalar are two fundamental arithmetic operations in the vertex processing. Since some complicated arithmetic operations in binary number system (BNS) turn...
The novel implantable stimulus driver for epileptic seizure suppression with low power design and adaptive loading consideration was proposed in this work. The stimulus driver consisted of the output stage, charge pump system, and adaptor can constantly provide 40-μA output stimulus currents, as the electrode impedance varies within 10~300 kΩ. The performances of this design have been successfully...
This paper proposes a specific low jitter and high speed Output interface which takes advantage of the Partially Depleted Silicon-on-Insulator technology while avoiding its drawbacks related to floating body effects. Thanks to an active body-biasing control technique, the additional jitter related to PD-SOI history effect, as well as the higher static leakage current compared to bulk technology, are...
This paper describes a dual-path phase locked loop (PLL) design which automatically tunes to capture the desired frequency as well as the input control voltage range of the dual-path LC voltage-controlled oscillator (VCO). A hybrid automatic frequency calibration (AFC) circuit provides digital frequency calibration and mixed-mode continuous frequency tuning. Since the hybrid AFC circuit independently...
Deformations of metal interconnects, cracks in interlayer dielectrics and passivation layers in combination with plastic-packaging are still a major reliability concern for integrated circuit power semiconductors. In order to describe and understand the failure mechanism and its root cause, already a lot of work has been done in the past. However for the first time the impact of the edge profile of...
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