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Racetrack memory (RM, also known as DWM (domain wall memory)) is an emerging memory technology that has many advantages such as low power, high density, and low access latency. Recent studies have shown that it is promising to architect RM as last level cache (LLC). Given that a RM track consists of m domains (for storing m bits data) and n access heads (1≤n<m), one RM access often requires multiple...
Emerging non-volatile memory (NVM) technologies provide opportunities to improve the performance of key-value databases (KVDBs) by deploying database on NVM. However, existing in-memory KVDBs cannot fully exploit the advantages of NVM. They process data on in-memory database and store an image on persistent storage via an underlying file system. The performance of database operations is degraded by...
Field Programmable Gate Array (FPGA) has been widely adopted as modern reconfigurable computing platforms. Traditionally, the storage elements in FPGAs are static RAM (SRAM), which has large leakage power and limited scalability. Recently, non-volatile memory (NVM) is proposed to replace the SRAM in FPGA systems for static power and density considerations, at the cost of inducing larger dynamic power...
In recent years, time-series data have emerged in a variety of application domains, such as wireless sensor networks and surveillance systems. To identify the similarity between time-series data, the Euclidean distance and its variations are common metrics that quantify the differences between time-series data. However, the Euclidean distances are limited by its inability to elastically shift with...
NVRAM provides the opportunities to improve the performance of applications as well as system software. In this paper, schemes for improving the user-perceived performance of browsers by using NVRAM are presented. We first define the user-perceived performance of browsers as two metrics: browser launch time and page loading time. The browser launch time could be minimized by caching the displayed...
Non volatile memory (NVM) is expected to enrich the next generation computer system. However, designers have difficulties in exploring new software and hardware design ideas based on NVM due to the limitations of current simulation-based evaluation, e.g., slow runtime. In order to resolve this problem, we present an open, reliable, and versatile hardware platform for NVM emulation. We built Zynq FPGA-based...
Next generation memory technologies, which we denote as new memory, have both nonvolatile and byte addressable properties. These characteristics are expected to bring changes to the conventional computer system structure. Most previous research on the use of new memory have been focused on how to efficiently store files, objects, and data structure while exploiting persistence in new memory. Unlike...
With the coming of ‘Big Data‘ era, high-energy-efficiency database is demanded for the Internet of things (IoT) application scenarios. The emerging Resistive Random Access Memory (RRAM) has been considered as an energy-efficient replacement of DRAM for next-generation main memory. In this paper, we propose an RRAM-based SQL query unit with process-in-memory characteristic. A storage structure for...
In this work, we propose a regularized learning method that is able to take into account the deviation of the memristor-mapped synaptic weights from the target values determined during the training process. Experimental results obtained when utilizing the MNIST data set show that compared to the conventional learning method which considers the learning and mapping processes separately, our learning...
Emerging resistive non-volatile memory technology (RRAM) is fast gaining importance as a possible successor of Flash memory. Very few experimental studies exist on emerging RRAM that analyze the impact of soft-techniques or purely algorithm driven performance enhancement for such memory devices. In this paper, we study in detail four different soft techniques optimized for bit-flip minimization, mainly...
Due to the durability of NVM, we are facing the great challenge of performing efficient memory defragmentation on persistent heaps. To address the problem, we propose an Online Persistent Memory Defragmentation (OPMD) method to manage persistent heaps. Employing two segment trees to track memory allocation and deallocation operations, our method can amortize the cost of global scan, and determine...
With the technology scaling of solid state drives (SSDs), data reliability has to be ensured by advanced Low-Density Parity-Check (LDPC) codes. As LDPC reads often take high latency, read performance involved in traditional garbage collection, called external GC, is largely decreased, which affects system performance. GC can choose not to correct data with LD-PC codes but just copy valid pages into...
3D NAND flash memory has been well developed due to its high density and decreasing cost compared with planar flash. However, one issue for 3D NAND flash, which has not been well solved, is its worse read disturb. The worse read disturb of 3D NAND flash stems from its much more word lines in a block. In this case, it receives much more read operations, leading to increased read disturb. Previous work...
Non-volatile memory (NVM) such as phase change memory is a promising technology for future low-energy and high-capacity memory systems. One of the well-known issues of NVM is its fundamental characteristics that are different from common memory subsystems with DRAM. In particular, the NVM write latency is much higher than DRAM while the NVM read latency is almost the same as DRAM. The latency asymmetry...
Flash memory-based storages are used in a wide range of systems from small mobile devices to large-scale system servers. The performance demand from applications and the technology of flash memory vary widely from one system to another, making it difficult to design a universal flash memory scheduler for all systems. In this paper, we present a framework for efficient and flexible flash memory scheduling...
Deep convolutional neural networks (CNN) have shown great accuracy on object recognition and classification tasks. Deep CNNs are computation intensive algorithms, hence many customized RRAM crossbar-based accelerators are proposed to meet the computing demands in deep CNNs, but the area costs and the power consumption are still great challenges for RRAM crossbar-based accelerators. In this work, we...
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