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The semiconductor industry is strategically focusing on automotive and industrial markets. Significant investment is targeted to address these markets. The automotive industry in particular is already in focus for last several years. At the same time, with its seemingly endless possibilities in the “internet of things” (IOT) world, industrial markets are gaining attention as building automation, factory...
Presents the introductory welcome message from the conference proceedings. May include the conference officers' congratulations to all involved with the conference event and publication of the proceedings record.
In a press release on March 6th 2017, IBM has commited itself to develop a commercial quantum system called IBM Q. For the first time this enables IBM to directly target potential customers in this field e.g. HPC groups or industrial R&D departments. Early access to a Quantum Computer on the cloud is enabled via the IBM Quantum Experience. The IBM Quantum Computer has been presented at this years...
The tutorial aims to address electrical communications link limitations by developing chipscale, integrated photonic technology to enable seamless intrachip and off-chip photonic communications that provide the required bandwidth with low energy/bit. The emerging technology will exploit wavelength division multiplexing (WDM), allowing much higher bandwidth capacity per link, which is imperative to...
Presents the introductory welcome message from the conference proceedings. May include the conference officers' congratulations to all involved with the conference event and publication of the proceedings record.
In this paper we introduce and evaluate Haar based codec assisted medium and long range data transport structures, e.g., bus segments, Network on Chip interconnects, able to deal with technology scaling related phenomena (e.g., increased susceptibility to proximity coupling noise and transmission delay variability), targeting energy savings at the expense of a reasonably small overhead, i.e., 1 extra...
Interface-based design methodologies and tools using machine-readable metadata have been in use for many years; however, a lot of manual effort is still needed to gather module information, especially when the SoC and modules are being co-designed. It is a time-consuming and error prone challenge made more difficult by increasing SoC complexity. Various efforts to address these issues with document-based...
Power Semiconductor devices used for high voltage, high current applications dissipate lot of power thereby rapidly increasing their junction temperature to levels beyond which no SPICE (Simulation Program with Integrated Circuit Emphasis) models exist. In this paper, the design of an integrated four channel squib driver SOC (System on Chip) with four High Side (HS) drivers and four Low Side (LS)...
Power density will stay a major challenge for the foreseeable future. Despite orders-of-magnitude-improved efficiency, power consumption per area is sharply rising, mainly due to the limits of voltage scaling. To investigate the physical implications of high power densities, we must distinguish between peak and average temperatures and temporal and spatial thermal gradients because they trigger circuit-aging...
Smartphones are becoming essential devices used for various types of applications in our daily life. To satisfy the ever-increasing performance requirement, the number of CPU cores in a phone keeps growing, which imposes a great impact on its power consumption. This work presents a series of analysis to understand how the current Android resource management policy adjusts CPU features. Our results...
As fault-tolerant Networks-on-Chip (NoCs) become prevalent in reliable systems, their overhead must be accurately evaluated. In this paper, we evaluate the overhead of a soft error resilient real-time NoC router for ASICs in terms of area and power. We employ a power analysis framework and load profiles that provide accurate power figures. Furthermore, we analyze the power behavior in normal operation...
This paper proposes a placement algorithm using analytical placement (AP) and low-temperature simulated annealing (SA) for mixed-grained reconfigurable architecture (MGRA) with dedicated carry chains. The target MGRAs are assumed to have fine-grained blocks with dedicated carry chains to implement high-speed adders/subtracters and coarse-grained blocks to implement complicated arithmetic operations...
Cardiovascular Diseases (CVDs) are a major concern. They are responsible for 35% of deaths and for costs of billions of dollars worldwide. Prevention of CVDs has become a global priority. Comprehensive use of wearable devices operating in the context of Internet-of-Things (IoT) paradigm is the key to monitor, diagnose and treat CVDs. Most of the previous approaches propose wearables only for non-invasive...
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