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Market trends for Multimedia Application Processor go on pushing CMOS technology in nanometer range. This puts analog design community in a strange paradox with simultaneously big challenges and tremendous opportunities. Analog is more than ever a key ingredient of advanced SoC with high performances PLL, giga samples high speed serial links and embedded power management. Challenge appears while achieving...
In this paper, we review the state of the art of digital and analog circuits that have been shown in recent years in organic thin-film transistor technology on flexible plastic foil. The transistors are developed for backplanes of displays, and therefore have the characteristics to be unipolar and to possess two gates. The dual-gate architecture is employed to increase the transistors intrinsic transconductance,...
Silicon photonics has generated an outstanding interest for optical communications and for inter and intra-chip interconnects in electronic systems. High performance generic building blocks that can be used for a broad range of applications have already been demonstrated such as waveguides, I/O couplers, laser sources by III-V/Si heterogeneous integration, fast silicon modulators and germanium photodetectors...
The exact functioning and operation of the brain has been and still is to a major degree a great mystery. The recent introduction of advanced imaging tools such as fMRI, EEG and eCoG and, most recently, direct neural sensing are throwing the doors of neuroscience wide open, and enable direct in-vivo observations of the brain at work in dynamic conditions. This may help to address a broad range of...
Multi-standard connectivity has become de-facto for smart phones and laptops but is emerging also to other more specialized gadgets like e-book readers. Such devices need to be designed for the best performance even when multiple standards are operating simultaneously. In the future, RF band allocations will make the scene even more complex especially in LTE evolution towards band aggregation. Once...
Wireless medical implant technology has been revolutionized in the last 10 years with the introduction of the world-wide Medical Implant Communication Service (MICS 402–405 MHz) and more recently MedRadio (401–406) MHz band. This has enabled the growth of remote monitoring with improved patient care. Recent advances and future developments in this growth area are presented.
Monolithic integration of electronic systems is one of the major techniques to reduce cost, size and power consumption in state-of-the-art consumer applications. Integration of transceivers and other mixed-signal building blocks has proven to be a very successful approach to build low cost, compact and portable systems [1]. Remarkably a certain building block remains discrete in commercial applications:...
High-k dielectrics and metal gate electrodes have entered complementary metal-oxide-semiconductor (CMOS) logic technology, integrated in both gate-first and gate-last schemes. We review gate-first high-k / metal gate (HKMG) innovations enabling continued device scaling to the 22 and 14 nm nodes and beyond. First, we summarize some of the insight that allowed early HKMG challenges such as equivalent...
The tunnel field-effect transistor (TFET) utilizes a metal-oxide-semiconductor MOS structure to control the Zener tunneling current in a p+n+ junction. Current understanding and status in the development of TFETs with steep inverse-subthreshold-slope is reviewed.
In this paper, we review the recent advances of GaN power switching and RF transistors developed at Panasonic. The presented devices are formed on cost effective Si substrates, which are very promising for the future mass production contributing to the reduction of the total fabrication cost. We develop the epitaxial growth technology using metal organic chemical vapor deposition (MOCVD) over 6-inch...
This paper presents the design and measurements of a 4× oversampled 18th order digital low-pass FIR filter aimed at replacing all analog baseband filters in a 60 GHz high data-rate wireless communication transmitter. Pipeline CPL adders and TSPC flip-flops are used to enable a very high output sample rate. The filter area is 0.1mm2 in a standard 65nm CMOS process. The interpolator has been designed...
This paper presents a DPA-resistant AES crypto engine. The DPA countermeasure circuit is combined with a self-generated random number generator to eliminate an extra circuit for generating random bits. The cell area for the DPA-resistant AES crypto engine is 0.104 mm2 in UMC 90 nm CMOS technology, which is only 6.2% larger than an unprotected AES engine. The maximum operating frequency of the AES...
The challenge in designing LDPC decoders is the efficient realization of the global communication between the two basic component types of such a decoder. Tight timing constraints in high-performance applications demand for a dedicated interconnect, which in general negatively affects the decoder features, especially the silicon area. Various approaches to reduce this impact have been discussed in...
Due to the increasing uncertainty of data for higher transmission rate, the Forward Error Correction (FEC) devices need to provide more powerful error correcting capability for optical communication systems. As compared with traditional hard RS decoders, the soft RS decoders can perform substantial coding gain but require much higher hardware complexity. In this paper, a decision-confined algorithm...
A 128-entry × 128b content addressable memory (CAM) design enables 145ps search operation in 1.0V, 32nm high-k metal-gate CMOS technology. A high-speed 16b wide dynamic AND match-line, combined with a fully static search-line and swapped XOR CAM cell simulations show a 49% reduction of search energy at iso-search delay of 145ps over an optimized high-performance conventional NOR-type CAM design, enabling...
In this paper a class-D audio amplifier for mobile applications is presented realized in a 0.14μm CMOS technology tailored for mobile applications. The amplifier has a simple PDM-based digital interface that requires only two pins and enables assembly n 9-bump WL-CSP. A reconfigurable ate driver is used that reduces quiescent current consumption and radiated emission.
Class-D amplifiers exhibit high efficiency in spite of their simple implementation and, therefore, they are often used in portable devices with typical THD performance of the order of −65 dB. Presently, the possibility of using class-D amplifiers in applications requiring better THD (THD < −85 dB) is being investigated, in consideration of their possible application in huge markets (like high-performance...
Linearity and intrinsic gain enhancement techniques for realizing high-performance and low-voltage analog circuits in a deep-submicron CMOS are introduced. In place of a differential amplifier for the voltage-to-current (V/I) conversion at the input, a V/I conversion using a linear resistor and a positive feedback in a pseudo-differential configuration was adopted. The positive feedback concept was...
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