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A wireless power transfer (WPT) transmitter is presented that can simultaneously power devices operating at 200 kHz and 6.78 MHz, enabling a true multi-standard WPT transmitter. To achieve this, the proposed design utilizes two coils, each optimized for efficient power transfer when operating alone. By placing the coils co-axially on a single charging stand, concurrent power transfer is possible....
The paper focuses on the evaluation of locally-made biogas-powered generators to determine its electrical performance efficiency using the purified fuel. Since the demand of energy in the world is greatly increasing, the efficiency and financial concerns of the system is a major aspect. Locally-made biogas generator was chosen for the study due to its availability and abundance in the Philippines...
Network-on-chip (NoC) is being considered as a promising model to overcome the communication bottleneck of future multicore systems. It plays an important role in determining the area and power of the entire chip. As a basic component in on-chip router, arbiter has a large impact on the performance of router. A centralized arbiter called switch arbiter resolves conflicts between the input ports to...
In order to reduce inter-core data communication load, increase effective bandwidth, reduce storage space and power consumption, various solutions have been suggested for on-chip networks. The aim of this study is to employ data compression for the packets delivered between cores over the inter-core on-chip network. The packets transferring the cache lines between cores are compressed before transmission...
In this paper, we propose a prediction-based latency compensation system for head mounted display. Specifically, the proposed system uses a linear extrapolation of head orientations for prediction based on biological data of body. The experimental results show that the proposed system compensates a latency up to 53 milliseconds with 1.083 degrees of a minimum average error.
Energy-efficient design approaches for always-on imaging will be reviewed. Circuit design techniques including dynamic voltage scaling (DVS), dynamic current scaling (DCS), and dynamic frequency scaling (DFS) will be described. In addition, energy-efficient architecture for image signal readout will be described. Finally, power reduction techniques by adaptively suppressing spatial and temporal bandwidth...
This paper presents a thermometer SoC design that can be manufactured and monolithically integrated in the ASIC standard CMOS process. A high gain low power trans-impedance amplifler(TIA) circuit and phase locked loop(PLL) are designed for readout. The resonator based thermometer has been demonstrated with a sensitivity −5.7Hz/°C(−139ppm) in a temperature range from −40°C to 120°C. Power consumption...
A dual proof-mass structured gyroscope integrated with readout circuit have been proposed. The C to V stage is achieved by the differential difference amplifier (DDA) which has advantages of high gain, low temperature and process dependence. Chopper Stabilization (CHS) and Corrected Double Sampling (CDS) is used to suppress low-frequency noise and compensate DC offset. The gain of DDA is 25dB and...
A monolithic MEMS resonator based pressure sensor and monolithically integrated with TIA (trans-impedance amplifier) readout circuitry has been fabricated in standard 1p6m AISC process. Dependence of the quality factor and ambient pressures are well known to resonator designers and it will be feasible to integrate a quality factor readout circuitry to detect ambient pressure. By measuring the sample...
A wideband frequency synthesizer has been designed and fabricated to generate 780MHz(China), 868MHz(Europe), and 915MHz(Korea, North America) of three bands at the same time. It will be applied in the IEEE 802.15.4g SUN system. Measurement results show the frequency synthesizer has wide bandwidth of 1527∼2020MHz(about 27.8% of center frequency) and low phase noise characteristics of −98.63dBc/Hz at...
Performance of the low-noise amplifier (LNA) determines the sensitivity, impedance matching (reflection), and other critical parameters of the receiver. Carrier aggregation (CA) in LTE-Advanced and upcoming 5G requires the LNA to support multiple-outputs without degrading its dynamic range (DR) performance and thus requires the architectural changes. In this paper, several LNA topologies are presented...
The dual-band smart tag is designed and is fabricated using a 0.18 ρ 1-Poly 4-Metal CMOS Process, and the area is 5mm × 5mm. The dual-band smart tag can recognize and demodulate the frequency bands of both UHF band (868 ∼ 956 MHz) and HF band (13.56 MHz). The Digital block for verification is programmed in Arduino Uno board. Consequently, the dual-band smart tag communicates between the HF/UHF reader...
A 28GHz CMOS phased array T/R circuit is designed for 3-dimensional beamforming system in 5G millimeter-wave communication applications. The T/R circuit integrates a phase shifter, a digital step attenuator and a SP8T switch. It provides 64-state attenuations in 0.5dB step via 6-bit attenuator circuit, and 32-state phase shifts in 11.25° step via 5-bit phase shift circuit, and overall a 14dB insertion...
The VCO (Voltage Controlled Oscillator) and the high speed prescaler are designed using 65nm CMOS technology with the frequency of 28.5GHz 5G mobile communication system. The simulation result show that the VCO has 28.4∼28.8GHz tuning range and the prescaler divides the VCO output. The phase noise of the VCO is −173.75dBc/Hz at 1MHz and −181.43dBc/Hz at 10MHz offset frequency.
In this paper, we present a summary of 3D TSV inductors and their advances in RF applications. We describe a new inductor structure that uses fewer ground planes with the same functionality. Results were derived from a 3D full-wave simulation performed up to 2 GHz.
SC (stochastic computation) has been found to be very advantageous in image processing applications because of its lower area consumption and low-power operation. However, one of the major issues with the SC is its long run-time requirement for accurate results. In this paper, a new technique called the approximate stochastic computing (ASC) approach called the approximate stochastic computing (ASC)...
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