The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Presents the introductory welcome message from the conference proceedings. May include the conference officers' congratulations to all involved with the conference event and publication of the proceedings record.
Speaker recognition has been developed over many years and it comes with many different methods. MFCC is one of more the successful methods due to it being generally modeled on the human auditory system. It represents high success rate of recognition and strong robustness against noise in the lower frequency regions. However, in the higher frequency regions, it captures speaker characteristics information...
In this paper, a Verilog-AMS based methodology for automated verification is discussed. This solution is geared towards aiding the verification of behavioral models, which designers are tasked with when developing or editing a schematic. Up to now the conventional way to verify the operation of a model and how much it mimics the operation of a schematic is to visually inspect the output signals between...
The architecture of an Open-loop fractional divider is presented comparing the performance using different orders of DDSM to implement the Phase Error Calculator block. We show that the performance of the output clock is unconnected from the order of the DDSM and that consequently the first order structure is the most suitable for the implementation in a real device.
In this paper we investigate computer based methods for parasitic extraction in printed circuit board designs. We developed an automated flow for annotating functional designs without affecting design integrity.
This paper proposes to examine the possible uses of Artificial Neural Networks (ANN) to aid the landing of an Unmanned Aerial Vehicle (UAV) on a ship. Three distinct phases are proposed. The dataset required for training and testing was produced by simulating a ship's motion at sea using Unity. Phase 1 converts video images from a UAV on-board camera to numeric data. Phase 2 utilizes Phase 1 data...
In this paper, a mathematical framework is presented, helping in the identification and selection of the components that mostly affect performance in monolithic voltage regulators. A sensitivity analysis is proposed, showing how the loop transfer function depends on the values of the components used in the compensator. The theory has been validated through behavioral and transistor level simulations,...
This paper presents the design of a Class AB power amplifier operating at a frequency band of 3.4 GHz–3.7 GHz for LTE base station applications. The proposed design is targeted for a compact, low cost, high efficiency, and good linearity features. It based on GaN HEMT CGH40006P device manufactured by Wolfspeed/Cree. The design procedure and assessment of the presented power amplifier are described...
The majority of analog and digital integrated circuits with built in crystal oscillator use the Gated Pierce design where the oscillator is built around a single CMOS inverting gate. In most applications that require a high level of precision and stability of the performances versus Process, Voltage and Temperature (PVT) variations, this design is not suitable. The inverter cell itself is very sensitive...
This paper reports a new improved Clapp VCO topology designed in 180 nm Si-Ge HBT technology for operations around 5 GHz. The designed topology uses a series-tuned resonator, a back-to-back series varactor configuration for tuning the output frequency and a filtering tail current designed for shunting to ground the second harmonic noise component. At the supply voltage of 3.3V, and across Process,...
Recent years have witnessed tremendous advances in wearable technology with many applications ranging from health and fitness, sports, security, and more recently augmented reality. Classical body area networks have been reduced to small, wearable devices such as smart watches where signal acquisition is accompanied by processing or streaming to a more powerful device such as a smart phone (or “fog”),...
This paper details the process of designing, testing and developing an integrated sensors kit for recording a range of environmental parameters within a newly developed transportation unit called FreshBox. It has been designed to extend product shelf life as well as other improvements on conventional food storage and transportation. The sensors kit is transported within the FreshBox container and...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.