The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper presents a simulation method for the DCO. EM simulations are essential and inevitable for modern LC oscillator design. Although EM-simulators provide high accuracy, the EM-simulation time is very long when metal-oxide-metal (MoM) capacitors are present. The proposed frame-based EM-simulation can significantly reduce the EM-simulation time even in the presence of MoM capacitors without influencing...
We have investigated dynamic characteristics of ferroelectric Hf02 (FE-Hf02) by considering multiple domain (MD) and linear domain-domain interaction. By using the calibrated MD model, experimental dynamic responses of FE-HfO2 can precisely reproduced, for the first time. Input voltage amplitude (Vin) and external resistance (R) dependences of dynamic responses in FE-Hfö2 revealed that dynamic term...
We have investigated dynamic characteristics of ferroelectric Hf02 (FE-HfÓ2) by considering multiple domain (MD) and linear domain-domain interaction. By using the calibrated MD model, experimental dynamic responses of FE-HfO2 can precisely reproduced, for the first time. Input voltage amplitude (Vin) and external resistance (R) dependences of dynamic responses in FE-HfO2 revealed that dynamic term...
Rectifier circuits or power harvesters are a critical module in a variety of wireless sensors, radio frequency identification (RFID) tags, and Internet-of-Thing (IoT) devices relying on harvested power from radio waves. The threshold compensation circuit techniques have been proposed in the literature to improve the Power Conversion Efficiency (PCE) of CMOS-based rectifiers. However, these circuits...
A digital calibration technique for folding-integration/cyclic cascaded (FICC) analog-to-digital converters (ADCs) is proposed in this paper. The calibration is done by compensating non-ideal errors in digital domain. The errors generated during each converting cycle and the final effects of them are calculated with properly established model in charge domain according to the behaviors of the FICC...
An on-chip buck converter with 3D chip stacking is proposed and the operation is experimentally verified. The manufactured converter achieves a maximum power efficiency of 62% for an output current of 70mA with a switching frequency of 200MHz and a 2x2mm on-chip LC output filter in 0.35mum CMOS. The use of glass epoxy interposer to increase the maximum power efficiency up to 71.3%, and the power efficiency...
A delay-locked loop of multi-band selector with wide-locking range and low power dissipation is presented. The architecture of the proposed delay-locked loop consists of phase frequency detector, charge pump, band selector, multi-control delay line, and start-up circuit. The multi-band selector is used to extend operation frequency of delay-locked loop by switching the multi-control delay line. The...
This paper describes a comparative analysis between two topologies of operational amplifiers to design a 40 MS/s 12-bit pipeline analog to digital converter (ADC). The analysis includes AC and transient simulation to select the proper topology. This ADC is implemented in a 0.35 mum AMS CMOS technology with 3.3 V single power supply. The capacitors and selected operational amplifiers were scaled for...
Class D amplifiers are becoming the most feasible solution for embedded audio application. However, distortions due to the non-linear nature of switching stage are the main drawback for this amplifier topology. This paper discusses the design and implementation of high fidelity audio class D using sliding mode control scheme. This design method proves to be a cost effective solution for industrial...
The design of a full integrated electronics readout for the next ILC ECAL presents many challenges. Low power dissipation is required, and it will be necessary to integrate together the very front-end stages with an analog to digital converter. We present here a 12 bit 30 MHz analog to digital converter using a pipelined architecture. It is composed by ten 1.5 bit sub-ADC with a final 2 bit flash...
In this paper, the characteristics of the basic current mirror and the continuous-time current-mode current mirror integrator are analyzed. Using the two unlossy loop integrators and the basic current mirrors, the biquad circuit block is implemented. The signal flow graph (SFG) and the improved leap-frog (ILF) structure are simple to implement the six-order band pass filters. Exploring PSPICE9.1 simulation...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.