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A novel and simple structure for improving CMRR is introduced. This structure can be added to the circuits like folded cascode amplifier, telescopic amplifier, current buffers, .etc to improve the CMRR of these circuits. This simple and effective circuit uses common mode deviating technique to improve CMRR at least 12dB while preserves CMRR bandwidth which is a novel technique in order to improve...
A modified regulated cascode structure having high output swing capability is presented. This structure is used in the implementation of a current mirror. The current mirror possesses wide input and wide output swing capabilities, suitable for low voltage operation. P-SPICE simulations at 0.25 ??m CMOS technology validate the proposed current mirror for currents from 30 nA to 220 ??A, at 1 V with...
An ultra low-power CMOS low-dropout regulator (LDO), consuming only 680-nA quiescent current with fast transient response and 10-mA load capability, is proposed in this paper. It is designed in a 0.35-μm CMOS technology and verified by HSPICE simulations. With the proposed internal frequency compensation method, the LDO can be stabilized without minimal requirement of equivalent-series-resistance...
Two modified regulated cascode amplifier (RCA) structures are presented that reduce the output compliance voltage requirements of conventional RCA. One structure utilizes a push-pull amplifier to enhance output resistance whereas the other structure incorporates a level shifter in the conventional RCA structure. P-SPICE simulations have been used to validate the proposed structures at ??0.6 V for...
A new modified infrared tracking sensor array is proposed, which identifies the locations and sizes of thermal object efficiently with the winner-take-all (WTA) circuit and a low offset correlated double sampling (CDS) circuit. The winner-take-all (WTA) circuit is used in combination with active readout circuit for thermopile array. The offset reduction with CDS technique enhances the sensitivity...
The paper presents a logic interconnect device (LED) to model digital circuit with near back-end-of-line (BEOL) effect, and to measure system performance. It is driven by a product inverter-based logic circuit, and it is loaded with near-BEOL wiring. The LID ring oscillator is measured and analyzed in 65 nm SOI CMOS. The methodology offers in-situ characterization of near-BEOL interconnect parasitics,...
In this paper, a new tunable CMOS resistor is proposed. The resistance is inversely proportional to bias current, to provide the resistor with a wider tuning range. And transistors, composing the active resistor, work at saturation region to achieve very large resistance within a small area. As an example, a low pass RC filter using tunable CMOS resistor realized in 0.5-mum CMOS technology is reported...
This paper presents high Q and high current on-chip inductors manufactured in an innovative Radio Frequency (RF) Back End Of Line (BEOL), made of two 3 mum thick top copper levels, integrated in an Advanced Low Power 65 nm RF CMOS technology. Achieved inductors using this optimized RF BEOL are firstly reported, compared with those using one single thick copper level BEOL, and benchmarked with current...
This paper describes theoretical as well as practical aspects in designing low phase noise LC CMOS oscillators. It starts with an overview of the different oscillator performance parameters found in a typical oscillator specification sheet. It also describes the LC-tank oscillation phenomena by analyzing a simplified LC oscillator circuit. Oscillator phase noise analysis is then introduced as a logical...
Enhanced analytical equations are derived to predict the inductance and series resistance of a common active inductor configuration. The equations, based on MOSFET small-signal parameters, are used to predict the inductance and series resistance of an active inductor implemented in a 0.18 ??m CMOS process. The inductor's characteristics are presented, demonstrating analytical equation accuracy and...
A Q-enhanced L C filter, implemented before, is investigated with some enhancements and small changes; trying to remove the off-chip filter needed before the low noise amplifier in a front-end receiver. The proposed Q-enhanced filter delivers about 25.4 dB of voltage gain, 3.4 dB noise figure, 1-dB compression point dynamic range of 144 dB.Hz, 28 MHz of 3-dB bandwidth and operating at 2.55 G Hz as...
Compact diode models normally available in commercial simulators like Spectre or HSPICE do not scale the series resistance with P-N distance. The standard diode models scale with drawn area, assuming the current is vertical. However the diodes used for ESD protection in CMOS are operating as lateral diodes, so the resistance should scale with width, not area. This is a serious problem for circuit...
In this paper, a 75 - 95 GHz wideband power amplifier (PA) in 0.13-mum CMOS is implemented to explore the feasibility of low-cost CMOS technology for use in 71 - 76 GHz, 81 - 86 GHz and 92 - 95 GHz fixed point-to-point link bands and the 77-GHz vehicular radar band. The fully-integrated design incorporates the power amplifier, matching networks, and input and output transmission line networks on-chip...
A non-self protection ESD scheme using grounded-gate, gate non-silicided (GG-GNS) drain/source silicide blocked (SBLK) ESD NFET offered in 45 nm SOI CMOS technology is presented based on a comprehensive study using the high current pulse characteristics. The results show that with a minimum SBLK width over drain/source, GG-GNS NFET can handle ~3.4 mA/mum current.
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