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In this paper, a Johnson-encoded Reconfigurable Synchronous/Bi-Synchronous (RSBS) FIFO is proposed which can adapt its operation to either synchronous or bi-synchronous mode. The proposed FIFO which can be used to interface modules in Voltage/Frequency Islands (VFI) based Networks-on-chip, is capable of alleviating the excessive energy consumption and high performance overhead of the conventional...
We have already proposed a hybrid single-carrier (SC) and multi-carrier (MC) system for next-generation mobile communication system. A SC signal has low peak-to-average power ratio (PAPR), which yields high power output for wide coverage. A MC signal is robust against frequency-selective fading and has high data rate with quadrature amplitude modulation (QAM). By appropriately selecting SC and MC...
Mobile communication networks are usually planned to provide some minimum service quality level during peak traffic hours. Consequently, in off-peak hours, when traffic loads are lower, the network is characterised by over-capacity, in the sense that same service quality targets can typically be satisfied with a reduced set of network resources, e.g. sites, carriers, etc. In this paper, we propose...
The capacity problem is one of the main issues in researching the multi-channel IEEE 802.11 wireless networks. In this paper, we analyze the path capacity of the multi-channel wireless networks by estimating the RTS, CTS and the packet loss rate of the wireless links and calculating the average service time of the packet sending. We also analyze the channel assignment and channel switching problems...
In current high-performance PC clusters, the performance and cost of interconnection network are essential issues. Very cost-effective Ethernets, such as Gigabit Ethernet, as well as high performance SANs, such as Infiniband and Myrinet, are still widely used. The authors have been developing a multi-link binding network system for Ethernet, called RI2N, for high-throughput and fault-tolerant interconnection...
This paper takes a philosophically new approach to throughput-optimal scheduling queueing systems with interference. All existing popular approaches (e.g. max-weight, greedy, ??pick-and-compare?? etc.) focus on the weights of individual queues. We take an alternative approach, by focusing instead on the aggregate queues of bottlenecks. A bottleneck is a set of mutually-interfering queues; a schedule...
High throughput chip-level integration of communicating heterogeneous elements (CLICHE) architecture to achieve high performance networks on chip (NoC) is proposed. The architecture increases the throughput of the network by 40% while preserving the average latency. The area of high throughput CLICHE?? switch is decreased by 18% as compared to CLICHE?? switch. The total metal resources required to...
In today's technology generations, e.g. 90 and 65 nm, the static power consumption becomes a major contributor to the total power consumption. This paper focuses on the arithmetic level and shows a methodology for a substantial reduction of the static power consumption. Simulations are done in a typical 130 nm technology. Based on the simulation results, the static power in a digital filter is estimated...
To overcome the scalability issue, network-on-chip (NoC) communication architectures have been used in today's system-on-chip. At the same time, more and more applications place increasingly stringent demands on the quality of service for the on-chip communication. Thus it is important to provide guaranteed services to these NoC architectures. We propose a novel solution that maintains the area efficiency...
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