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Formal verification has become very useful and popular in last decade in area of embedded systems design and in analysis of critical systems. It can reveal common errors like deadlocks, starvation, check system invariants, but also verify more complex properties defined by LTL formulas whose writing may be very error prone for non expert users. To reduce the time-to-market for embedded systems and...
The Trustful Space-Time Protocol (TSTP) allows for time synchronization to be performed upon receiving any message from another node in a sensor network, removing the need for explicit synchronization messages. Previous work has shown that TSTP performs well under controlled experimental environments. In this work, we analyze how the quality of synchronization in TSTP is affected when nodes are communicating...
A 25–28Gb/s full-rate reference-less CDR is presented and designed in a standard 0.13μm SiGe BiCMOS process, which can be applicable to nearly all classical 100G communication protocols by multi-channel configuration. It consists mainly of a full-rate phase frequency detector, a quadrature voltage control oscillator and two voltage to current convertors with loop filters. A dual-loop topology is adopted...
The HEVC is one of the most recent video coding standards, developed in order to face upcoming challenges, due to higher video quality and resolution. One of the HEVC components is the entropy encoder, which consists only of the Context Adaptive Binary Arithmetic Coding (CABAC) algorithm. The CABAC algorithm imposes some severe difficulties in order to achieve increasing throughput, due to the high...
We present a 1×80 pixel line sensor for direct time-of-flight measurement based on single-photon avalanche diodes fabricated in a high-voltage 0.35 pm CMOS process. An in-pixel time-to-digital-converter with a resolution of 312.5 ps determines the arrival time of the first-photon for each emitted laser pulse from a flash illumination source for all pixels in parallel. Distance determination is performed...
With the rapid incensement of personal vehicles, urban traffics congestion is now a prominent problem in many major cities in China. Electronic Toll Collection (ETC) is an efficient solution for traffic jaw problem. This paper introduces an embedded system designed for Dedicated Short Range Communications (DSRC) standard based ETC system of China. In this system, a STM8L151G micro controller was used...
The clock synchronization technologies applied to controlling layer and primary equipment like intelligent switchgear of processing layer in intelligent substation are analyzed in this paper. IEEE1588 message timing mode, which can be accurate to nanosecond, is used as the mode of substation system, in order to fulfill the real-time and accuracy requirements of intelligent switchgears and remote control...
Recently, a new lightweight block cipher, SKINNY, has been proposed by Beierle et al. in Annual Cryptology Conference 2016. This paper presents an area-efficient FPGA implementation of SKINNY block cipher. In this paper, a new column-serial structure is proposed to speed up SKINNY without compromising its area cost, and the implementation of SKINNY S-box is optimized by utilizing FPGA embedded dual-port...
When encrypting a single file in the CBC mode of 3DES, there is a feedback path which brings data dependency. Even much more resources are given, it does not help matters to increase the throughput of 3DES. In this paper, we propose a logic simplifying method to accelerate the throughput in the CBC mode. In the datapath, 15 levels of XORs from the critical path can be moved to the non-critical path...
Many analog and mixed signal devices have very few or no digital pins. In spite of this, these products can be highly complex internally, including significant digital content. They may contain various sensors and control circuitry, which react to a variety of conditions to control the power profile of the part and its environment. These factors can make these devices very challenging to test. They...
Advanced Driver Assistance System is a growing trend in automotive industry that integrates multiple discreet components to create system level solution. A typical ADAS system in an automobile has single or multiple radar chips to transmit and receive electromagnetic waves and a microcontroller to process received data that is used for assisting driver in decision making. Radar chip and microcontroller...
A fully synthesizable analog-like loop filter for a Low-Dropout regulator using only digital standard cells is proposed. To accommodate this, various blocks such as comparator, time-to-digital converter and charge-pumps are developed using only standard cells. The fabricated prototype in 0.13μm process occupying 0.0875mm2 provides 15mA current with minimum quiescent current of 140μA and load transient...
We considered the range of PPP online services that solve the problem of high-precision coordinates and receiver time scale shift determination for the RINEX daily records. The comparative estimation of exact indicators of position determination for different geoids is given. The results contains the recommendations for use the online PPP services to solve the problem of time scales comparison.
The majority of UWB positioning systems rely on the first path component time of arrival measurements. In most systems, positioning algorithms assume that obtained results correspond to direct path component related to the distance between transmitter and receiver. Unfortunately, indoors, first path signal component is often delayed or even blocked by the walls or elements of interior design, what...
This paper presents a low power AES-GCM authenticated encryption IP core which combines an improved four-parallel architecture, an advanced 65nm SOTB CMOS technology and a low complexity clock gating technique. As a result, the power consumption of the proposed AES-GCM core is only 8.9mW which is lower than other AES-GCM IP cores presented in literature. The detail implementation results are also...
In this work, we present a modular software subsystem that exposes a set of APIs for supporting the automation of a set of design choices in the synthesis of a hardware accelerator by a proprietary FPGA toolchain. We model the subsystem around Vivado, Xilinx's proprietary FPGA toolchain, in order to provide a finer grained control on the toolchain's features with respect to the standard .tcl interface...
Synchronization has become a main concern in communication and control systems during the last years. Although there are several standard mechanisms to accomplish timing requirements, development and improvement of high synchronization technologies is required to obtain better performance and quality of service. In this context, the enhanced version of IEEE 1588v2 synchronization protocol, known as...
Distributed cyber-physical systems cover a wide range of applications such as automotive, avionic or industrial automation. These applications require a global notion of time to fullfill their timing requirements. Multi-processor system on chips (MPSOCs) are an attractive implementation option since they offer several benefits such as parallelism and power efficiency. However, MPSOCs have a Globally...
This work presents a 180-nm CMOS bandpass ΣΔ Analog-to-Digital Converter (ADC) developed to fulfill the specifications of a fully-integrated receiver for Magnetic Resonance Imaging (MRI). CMOS integration of a multichannel digital receiver would increase the quality of the image without the need of using many coaxial cables to connect the RF coils (located close to the patient) with the digitizing...
Artificial neural networks (ANN) have revolutionized the field of machine learning by providing impressive human-like performance in solving real-world tasks in computer vision, speech recognition, or complex strategic games. There is a significant interest in developing non-von Neumann coprocessors for the training of ANNs, where resistive memory devices serve as synaptic elements. However, interdevice...
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