The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
The end of Dennard scaling has led to an increase in demand for energy-efficient custom hardware accelerators, but current hardware design is slow and laborious, partly because each iteration of the compile-run-debug cycle can take hours or even days with existing simulation and emulation platforms. Cyclist is a new emulation platform designed specifically to shorten the total compile-run-debug cycle...
In this paper, the principle of normalized minimum-sum (NMS) polar decoding process is explored. It is demonstrated that with one properly chosen parameters for NMS algorithm, performances approach to that of the sum-product (SP) algorithm can be achieved. As well, the complexity reduction is realized by calculating a linear function instead of nonlinear function. Simulation results for successive...
Sophisticated cyber attacks by state-sponsored and criminal actors continue to plague government and industrial infrastructure. Intuitively, partitioning cyber systems into survivable, intrusion tolerant compartments is a good idea. This prevents witting and unwitting insiders from moving laterally and reaching back to their command and control (C2) servers. However, there is a lack of artifacts that...
The currently used hardware validation architectures for Application Specific Integrated Circuits intended for automotive Engine Control Unit development are reviewed and a new architecture is proposed. An alternative to hardware validation by different simulation architectures is proposed and analyzed.
Progressive edge-growth (PEG) algorithm was proven to be a simple and effective approach to design good LDPC codes. However, the low-density parity-check (LDPC) constructed by PEG algorithm is of a single code rate. In this paper, we propose a modified PEG algorithm to construct multiple-rate LDPC codes, which is referred to as the multiple-rate PEG (MR-PEG) algorithm. The obtained LDPC codes with...
The paper presents the system architecture, development and prototype implementation of a new integrated system for simulation of automated industrial processes using advanced technologies, in accordance with CPS/Industry 4.0 principles. The need to develop such a system is underscored by the interest of the educational stakeholders: students, faculty members, high-level industry partners, for an...
This paper investigates the switching performances of two state-of-the-art half-bridge SiC MOSFET modules using a standard double pulse test methodology. A deliberate choice of the modules with the same voltage and current ratings, the same packaging, but different stray inductances and capacitances is made in order to give an insight into the influence of parasitics in the switching transients and...
A Power Hardware in the Loop (FHIL) platform implementation for performing real time simulations of electric systems is proposed. The test bench consists of a FSS'®E real time power flow calculation in combination with a controlled grid emulator. Experimental results are presented to demonstrate the performance of the platform.
The algorithm of the electromagnetic environment estimation inside a cinema and concert hall control room, equipped by diverse (on power, sensitivity, frequency range and so forth) hardware, is proposed. The modeling program has been developed to simulate the indoor electromagnetic environment. The area of hardware control room is conventionally represented by two dimensional grids of cells for modeling...
When learning different control related concepts and methods, simulation is often used as a training tool; but, it does not have some real time characteristics of implementation like dealing with coding and PC resources, supervision, and communications. In some cases, implementation cannot be carried away, since it involves hardware design and is expensive. The proposed solution in this paper involves...
The MIL-STD-1553B standard specifies a bidirectional data bus that has been used in defense and aerospace industry in a vast number of systems. However, its use for simulation and development environments might lead to unnecessary restriction on the design and usability due to the high cost incurred for hardware and harness procurement. Since Ethernet networks are nowadays extensible present in simulation...
In this paper, we propose a high accuracy multi-chain time interval measurement (TIM) technique by employing the dedicated carry chain of FPGA. According to the principle of delay chain time to digital converter (TDC), the proposed method is realized by connecting the selectors inside the slices. The resolution of the delay chain method is limited by the time delay of one delay unit. To break through...
Software-Defined Networks (SDN) rely on flow tables to forward packets from different flows with different policies. To speed up packet forwarding, the rules in the flow table should reside in the forwarding plane as much as possible to reduce the chances of consulting the SDN controller, which is a slow process. The rules are usually cached in the forwarding plane with a Ternary Content Addressable...
Continuous demand for higher performance is adding more pressure on hardware designers to provide faster machines with low energy consumption. Recent technological advancements allow placing a group of silicon dies on top of a conventional interposer (silicon layer), which provides space to integrate logic and interconnection resources to manage active processing cores. However, such large resource...
Standardization bodies such as IEEE and 3GPP, as well as other interest groups, are in the process of defining and standardizing different functional subdivisions within mobile network base stations, primarily to reduce the data rate requirements imposed on the transport architecture by 4th and 5th generation mobile systems. Ethernet is considered the leading candidate for the transport architecture...
Datacenter networks are becoming crucial foundations for our information technology based society. However, commercial datacenter infrastructure is often unavailable to researchers for conducting experiments. In this work, we therefore elaborate on the possibility of combining commercial hardware and simulation to illustrate the scalability and performance of datacenter networks. We simulate a Datacenter...
Test automation in distributed systems requires new methods in signal simulation for the stimulation of the distributed system. Increasing complexity of electric electronic (E/E) systems enhances the testing-effort. The main challenge is reducing the time consuming manual stimulation in consideration of improving the quality of testing. Currently used systems for test automation with a software-based...
In this paper, we present Intercom, a simulator framework that provides separate components to address the interdependent aspects of IoT systems, such as sensing, physical interaction, wireless communication, and computation. We initially evaluate a scalable sensing and communication model, which simulates wireless signal strength measurements with an average error of 6.1dBm.
Hardware failures in cloud data centers may cause substantial losses to cloud providers and cloud users. Therefore, the ability to accurately predict when failures occur is of paramount importance. In this paper, we present FailureSim, a simulator based on CloudSim that supports failure prediction. FailureSim obtains performance related information from the cloud and classifies the status of the hardware...
With cloud computing, the efficient management of resources is of great importance as an increased utilization of the available resources can result in higher scalability and significant energy and cost reductions. Experimental validation of novel resource management strategies is costly and time consuming, and often requires in-depth knowledge of and control over the underlying cloud platform. As...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.