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The paper proposes analytical definitions of moderate inversion and moderate saturation. These definitions are introduced considering two different series expansions for the function ln2(x). The expansions are “matched”: the upper limit for convergence of the first series and the lower limit for convergence of the second series define the border and transition from weak to moderate inversion/saturation...
The paper presents a cascoded power stage with automatic dead time generation. The circuit is using the inter-transistor node voltages of the cascode configuration as feedback control signals to delay turning ON the power transistors. The circuit is designed as the output stage of a fully-integrated buck converter. The steady-state operation is described. The waveforms simulated on 45-nm CMOS process...
The paper presents a self-oscillating DC-DC integrated converter which is operable in the frequency range of 200MHz–260MHz. The circuit includes a cascoded power stage, an integrated transformer, duty-cycle detector, and pulse shaper. The primary of the transformer provides the transmission of power to the converter load. The secondary, via detector and shaper, provides the feedback signal to the...
The paper presents a cascoded power stage with automatic dead time generation. The circuit is using the inter-transistor node voltages of the cascode configuration as feedback control signals to delay turning ON the power transistors. The circuit is designed as the output stage of a fully-integrated buck converter. The steady-state operation is described. The waveforms simulated on 45-nm CMOS process...
The paper presents a self-oscillating DC-DC integrated converter which is operable in the frequency range of 200MHz–260MHz. The circuit includes a cascoded power stage, and an integrated transformer. The primary of the transformer provides the transmission of power to the converter load. The secondary provides the feedback signal to the gates of cascoded transistors in the power stage. The feedback...
The paper presents a new approach to design of current amplifiers. The amplifying cell core represents the connection of three transistors: a bias transistor and a differential pair. The bias transistor sets the distribution of currents in the differential pair. When an external current signal is applied to the core input the outputs of the differential pair provide two complementary current signals...
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