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A linear Support Vector machine classifier is proposed in this paper. In such SVM architectures based on multiplying laws the main building blocks are multipliers. We propose in this paper multiplying and weighting cells, developed by using a model consisting of a compound of two inverse non-linear functions. This procedure is suitable for VLSI implementation because it permits the use of simple nonlinearized...
This paper presents a reconfigurable and programmable analogue low pass filter for low voltage wireless applications. The proposed filter may be used for channel or band selection in multi-mode receiver front ends employing direct frequency conversion. The circuit has been synthesized using state variables and leapfrog OTA-C techniques, features programmable order, digitally variable frequency parameters...
This paper presents some fast and precise behavioral blocks used for the measurement of power, average and root mean square values in electronic circuits. They are fast and precise and the obtained results are better than the ones obtained with the Pspice functions. The method was tested on some filters, like LPF or HPF, and applied on DC-DC converters. We choosed to apply the method over these converters...
In this paper we propose a log-domain four quadrant current multiplier. This circuit can be used in modular log- domain VLSI architectures. The simplicity, low power consumption and high frequency operation recommend it for real time applications.
Some general models for current mode analog multipliers are developed in this paper. They are based on invertible functions FF−1. Such models lead not only to some well known multiplier cells like Gilbert’s ones, but also to new modular structures based on linear or nonlinear FF−1 building blocks; the examples are given in the ELIN design, in logarithmic and exponential domain.
This paper presents a reconfigurable and programmable analog array intended to support the implementation of the filter stage in a software defined radio (SDR) wireless transceiver. The analog array is designed using the transconductor-capacitor (Gm-C) technique and may implement a wide variety of analog filters of programmable order and transfer function. The filtering stage implemented by the analog...
We develop in this paper support vector machine (SVM) parallel classifier for image classifications. The SVM classifier basic modules are new modular log-domain four-quadrant current multipliers. The circuit was simulated taking into account real parameters of transistors in BiCMOS technology. There are many advantages of using such modular log-domain structures in high frequency large dimension circuits...
The PSpice functions used for measuring the power, average and root mean square are not accurate enough because of using specific techniques like products or filters. We created fast and precise specialised behavioural blocks that obtain the power, average and root mean square values of the signals by applying an integral relation. The computation is done after the transitory regime is finished and...
We systematized and developed some procedures for the modular design of externally-linear internally nonlinear (ELIN) circuits resulting in a general LIN↔ELIN transformation procedure. This one was also extended to analysis of these types of circuits. The procedure is exemplified on log-domain circuits. In the design one starts with the linear block diagram (LIN) described by transfer functions and...
This paper proposes a CCII-based structure from which one can derive, with minimum of adjustments, a series of biquads, able to realize not only the most usual second-order transfer functions - low-pass, band-pass, all-pass - but also transfer functions with imaginary and complex zeroes. Other interesting features of this universal biquad are its cascadability and the fact that it provides the orthogonal...
We present in this paper an analog CMOS current-mode circuit for calculating radial basis kernels. It represents the main component of some analog or mixed-signals support vector machine (SVM) classifiers. This circuit will be used in a PSpice simulation environment for VLSI circuits including SVMs for image detection, implemented in hardware, a useful tool not only in our multidisciplinary research...
We propose modular log-domain structures for implementing analog multipliers intended to be used in SVM (support vector machines) classifiers and neural network structures
Support Vector Machines are widely used in pattern recognition, being the newest achievements in neural network structures. This paper presents a Block RAM -based implementation example of an SVM classification function using a Spartan3 FPGA, compared versus a distributed LUT-based RAM one The number of required clock periods and the maximum clock frequency is calculated and a speed comparison of...
The paper presents a method for generating filter transfer functions optimized in respect to a wide range of behavioural criteria. It consists of an iterative loop that uses the SQP algorithm as the main optimization engine; the process is controlled by a genetic algorithm tailored to this application. A design example illustrates the effectiveness of this method.
This paper proposes several high-speed voltage buffers and an effective method for optimizing their step response. The buffers combine a low offset structure with a signal-dependent biasing technique that results in significant slew-rate enhancement. A set of RC networks provide an effective way of controlling the step-response parameters and ensures input impedance matching. The compensation elements...
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