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The 2016 IEEE Silicon Nanoelectronics Workshop is a satellite workshop of the 2016 VLSI Symposia sponsored by the IEEE Electron Device Society. It is the twenty-first workshop in the annual series, which showcases original work on nanometer scale devices and technologies that utilize silicon or which are based on silicon substrates.
A novel 3D MOSFET device concept with reduced intrinsic capacitances shows promise for performance improvements at advanced nodes, based upon physics-based TCAD analyses.
In the paper, the EIS structure with high-k ZnO sensing film has more responsive to H+ relative to Na+ and K+. The Ti doped ZnO sensing membrane annealed with RTA at 700°C shows a higher sensitivity of 57.56 mV/pH, higher linearity, lower hysteresis voltage of 2.79 mV and lower drift rate of 0.29mV/hr than the ZnO samples.
In this study, low-energy microwave annealing(MWA) is used to activate the germanium material which is new promising and might replace silicon in the future. A novel MWA method with two steps applies to germanium for solid phase epitaxial recrystallization(SPER) and dopants activation. The purpose of the first step MWA at 2P(1.2kW) for 75 sec is to quickly repair the destroyed crystal lattices which...
This keynote talk discusses challenges and directions for research on silicon and silicon-like devices as the industry approaches the end of the CMOS scaling era.
While two-dimensional (2D) materials continue attracting an increasing amount of interest in the scientific community, the main question remains what type of application will benefit most from their unique 2D properties. Transition metal dichalcogenides (TMDs) combine 2D transport properties with a sizable bandgap, but do not show the amazing mobility values that had made graphene an exciting candidate...
Silicon tunnel devices are important for low power-consumption and fast-switching electronics. Inter-band tunneling current is, however, limited due to the indirect-bandgap nature of Si, but low-dimensionality of the devices may bring new effects into play. In this work, we analyze two-dimensional lateral Si Esaki diodes and first observe that inter-band tunneling is still largely mediated by phonon...
Layered semi-metallic materials other than graphene have not received much attention. Here, we examine electrical and thermal transport in WTe2 devices by experiments, analytical and finite element simulations. We uncover that few-layer WTe2 has remarkably high current density but ultra-low thermal conductivity, suggesting potential use as phase-change memory electrodes.
We report the realization of high performance BP transistors integrated with an ultra-thin HfO2 high-k gate dielectric using a low temperature CMOS process. The fabricated devices were shown to demonstrate an enhanced hole mobility of >400 cm2/Vs and subthreshold swing (SS) of ∼69 mV/dec at room temperature. These figure-of-merits are benchmarked to be the best-of-its-kind, which outperform previously...
The switching dynamics of electrically driven insulator-to-metal transition (IMT) and metal-to-insulator transition (MIT) in vanadium dioxide are investigated. The transient response of time domain measurements are modeled using a domain based 2-D heterogeneous resistive network, taking into account local electronic potential and local Joule heating. It reveals, the switching time is dominated by...
Trapped charges at oxide interfaces in field effect transistors are well known sources of noise and generally degrade the device performance. At low temperatures, operating in the sub-threshold regime, conduction electrons can be confined to percolation pathways [1]. The scattering potential produced by trapped charge can then have a dramatic effect on the conductance, normally observed as random...
Single-electron tunneling in donor-atom transistors has been reported mostly at low temperatures, due to the relatively low tunnel barrier. Higher tunnel barrier, necessary for room-temperature operation, can be expected by coupling closely-placed donors to form a quantum dot (QD). For that purpose, we fabricate a-few-donor QDs in narrow-channel SOI-FETs by a selective-doping technique. In these devices,...
On the industrial HKMG silicon MOSFETs with different channel lengths L down to 14 nm, we present high-resolution TEM cross-section images to highlight interstitial defects in the channel near the source and drain. To examine such neutral defects, we devise a new 2D microscopic scattering model and use it to extract the apparent neutral defects density from the measured inversion-layer effective mobility...
We report both Raman shift and photoluminescence (PL) in Ge as a function of carrier density instead of dopant concentration. The results show both the energy band gap (Eg) and zone-centered phonon frequency are dependent on free carrier density. In the low voltage device operation, it should be taken into consideration that material constants so far accepted are not really constant anymore.
The understanding of the switching mechanisms in resistive random access memory is of interest as one can use the fundamental mechanisms to better design the memory structure for enhancing both switching and reliability performance. Various analytical methods have been explored to better understand the wear-out and eventual failure mechanisms of RRAM stacks. This includes atomic-scale characterization...
A high-K/metal gate (HKMG) stack (TiN/Al-doped-HfOX/SiO2/Si) based bipolar RRAM cell is proposed and fabricated by 28/20nm HKMG CMOS compatible technology. Robust reliability behaviors (retention @200 °C >4×104 s and endurance > 105) and sub-μA switching current are both demonstrated. The sub-μA switching current and self-selection nonlinear I–V characteristics are attributed to the SiO2 interfacial...
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