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This paper describes the design of a highly accurate proximity sensing system that is capable of operating in a wide distance range. The system is based on passive inductive proximity sensors that can withstand harsh environments, and, therefore, are widely used in avionic applications. Our design methodology consists of determining the ideal trade-off between the sensor excitation method and the...
Recent advances in nanoscale components assembly have led to the invention of low-power and high-density nanofabrics, which can be integrated with conventional CMOS transistors. CMOS/nanofabric hybrid circuits combine the flexibility and high fabrication yield advantages of CMOS technology with ultra fast nanometer-scale devices. CMOL is a novel architecture which consists of a nanofabric overlay...
As the advance of IC manufacturing, the IC complexity is getting more and more complicated. Lots of existing designs and intellectual property (IP) are widely reused. Different from remaking a whole new chip, reusing existing designs or IP can release the pressure of time-to-market and save money. By utilizing logic difference technique, IC designer can identify differences between old and new circuits...
Internet of Things (IoT) incorporates concepts from pervasive computing and enables iteration between people and objects. Location service is one of the primary services of IoT. However, existing techniques for indoor localization either have low accuracy or are too complex, requiring a high investment. This paper presents a technique of RFID indoor localization based on an analytical model of the...
Reliability has emerged as an important design criterion due to shrinking device dimensions. Several reliability estimation techniques have been proposed which apply either fault injection or analytical methods. Among all such techniques, design diversity, which is initially proposed to protect system from common-mode failures using redundant copies of different implementation, has been applied to...
In this paper, we describe a fully-integrated digitally-controlled low-dropout regulator (LDO) with dual-loop architecture, providing core voltage to an ultra-low-power microcontroller (MCU). The fine-grained loop dynamically modulates the active-mode LDO drive-strength using the MCU power-modes information for a maximum load current of 6mA, thereby improving the active-mode current efficiency. The...
We present a delta-sigma modulator in a standard CMOS process that is designed to operate over a wide temperature range from −55 ºC to 225 ºC. The circuit is implemented using IBM 0.13μm CMOS technology with 2.5V power supply. We applied constant-gm biasing technique and other design considerations to compensate performance degradation over temperature variation. Simulation results show that the modulator...
This paper presents an inductor-less adaptive linear equalizer using a proposed tunable hybrid active filter comprising both low-pass and high-pass filters within a power detector. This technique leads to tunability of the adaptive linear equalizer over a wide range of throughput from 4 Gbps to 14 Gbps. The entire equalizer circuit is designed, optimized and post layout extracted in 65 nm CMOS technology...
In this work, we address the multiple voltage scheduling problem to minimize power consumption under both timing and resource constraints. We develop a tabu search-based algorithm with a general vector representation of solution and an effective performance estimation. Moreover, our approach tends to solve a series of scheduling problems with respect to multiple voltage designs. Specifically, our...
In this paper, a fully digital single-inductor dualoutput (SIDO) DC-DC Buck converter architecture is presented. The proposed converter features a simplified control loop that eliminates duplication of the controller sub blocks and allows for use of a single Pulse Width Modulator (PWM), compensator, and comparator to regulate the two outputs, therefore reducing overall system complexity. A 3rd order...
The design of high performance SRAM in scaled technology nodes has become challenging due to an increase in both variation and leakage. The sense amplifier is one component that is particularly sensitive to threshold voltage variation due to its symmetrical design. Reducing the intrinsic input-referred offset of the sense amp reduces the bitline development time, which improves both energy and delay...
The exponential advance in semiconductor manufacturing technology is bringing heavy increase not only in power consumption but in test data volume as well. Moreover, power consumption in test mode is much higher than that in the functional operation mode. In this paper, a low power scan bypass technique is proposed to reduce both the test data volume and the test power consumption. The proposed technique...
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