The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
The pace of technological change has again reached an inflection point setting the stage for a new era of dramatic innovation in the electronics industry. This pace is driven by the growth of wireless communications from sensors throughout our everyday environment connecting and transmitting data across ever-expanding wireless networks. As a result, the demands upon computing for artificial intelligence...
The latest development results for flexible and printed electronics technology based on organic thin-film transistor (OTFT) devices as well as printable semiconductors and metal nanoparticles are briefly reported in this paper. The successful fabrication and operation of printed OTFT devices and potential integrated circuit applications such as flip-flop logic gates and operational amplifiers will...
Advanced heterogeneous integration (HI) technology is much needed for applications from edge to cloud to meet the stringent system-level requirements on performance, power, profile, cycle-time and cost (P3C2). In addition to 3DIC with TSV innovative packaging technologies such as silicon interposer (2.5D) and fan-out wafer-level-packaging (2D/3D) become new paradigm for the semiconductor industry...
We describe IBM's roadmap for Neuromorphic Technologies to drive next-generation cognitive computing, ranging from nanodevice-based hardware for accelerating well-known supervised-learning algorithms (which happen to rely on static, labeled data), to emerging, biologically-inspired algorithms capable of learning from temporal, unlabeled data. The various hardware-centric neuromorphic projects currently...
By combining the functionalities of Boolean gates and non-volatile memory, stateful logic may enable significant savings in time and energy for computational processes where available power source is limited. In this talk, fundamental principles of stateful logic will be described first, and circuit level implementation of it using recently explored bi-functional memristor (coexistence of unipolar...
A new computing using Ising model that effectively solves combinatorial optimization problems is proposed. The computing maps problems to an Ising model, a model to express the behavior of magnetic spins, and solves the problems by its own convergence property. We fabricated a prototype computing chip and confirmed the power efficiency of the chip is 1800-times higher than that of the conventional...
In this contribution we give an overview of the recent development of metal-halide perovskite solar cells. We focus on the mixed electronic-ionic conductivity of this material, which causes hysteresis in the current-voltage curve. We discuss latest results on recombination obtained by electroluminescence measurements. We report on high luminescence yields (1%) and open-circuit voltages larger than...
In this paper, the impact of fin number on device performance and hot carrier induced device degradation was investigated for n-channel tri-gate multi-fin FinFET with different fin numbers. The threshold voltage (VTH) shift, transconductance, and subthreshold swing degradation were extracted to determine the degradation of device. It was found that the device with fewer fins shows better device performance,...
The impact of source/drain e-SiGe process engineering on time dependent dielectric breakdown (TDDB) on core PFETs fabricated with bulk FinFET technology is evaluated. It is observed that thicker e-SiGe buffer layer improves the PFETs TDDB. Electrical and physical analysis revealed that with thinner buffer layer, Ge atoms migrate to gate dielectric and accelerate the breakdown mechanisms due to poor...
We examine the electrical and physical properties of ALD Al2O3/InxGa1−xAs (x = 0.53, 0.7 and 1) MOS interfaces with (NH4)Sy, BHF and HF pretreatment. It is found that, in higher In content (x), InxGa1−xAs MOS interfaces with BHF and HF cleaning exhibit better C-V characteristics and lower interface state density (Dit) than with (NH4)Sy pretreatment. Also, amounts of arsenic oxides, evaluated from...
Two new processes for deep junction formation have been demonstrated with low thermal budget UV excimer laser annealing using the melting regime: (i) in-depth controllable activation after high energy implantation and (ii) diffusion and recrystallization after heavily-doped Si deposition.
Device performance enhancement elements are frequently reducing device reliability margin in scaled CMOS technologies. To assess the impact of HCI degradation on digital CMOS logic we study the frequency degradation (Δf/f) of ring oscillator circuits using core and IO devices in 14nm FinFET technology and correlate the results with discrete device degradation using the conventional DC and a novel...
Random telegraph noise (RTN) is one of major recent transistor reliability concerns in designing reliable systems. In a circuit that contains a large number of small transistors, the impact of RTN-induced fluctuation is considered to increase when it is compared with the static frequency variation caused by manufacturing process. The impact of RTN on process variation is described based on our measurement...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.