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Presents the introductory welcome message from the conference proceedings. May include the conference officers' congratulations to all involved with the conference event and publication of the proceedings record.
Aèsiraci-Networks-on-Chip are vulnerable to a variety of manufacturing and design factors making them susceptible to disparate faults that cause corrupted message transfer or even catastrophic system failures, due to the central position of the NoC in the system. Therefore, a NoC system should be fault-tolerant to transient malfunctions or permanent physical damages. The terminology of fault tolerant...
In the paper, the memristive two-port is defined via its constitutive relation as a two-dimensional surface in a four-dimensional space of the port charges and fluxes. It follows from six possible representations of this two-port that it can be modeled via classical two-terminal memristors /memductors, complemented by four types of memristive controlled sources, each of them being controlled by two...
We present a silicon nanowire-based field-effect transistor biosensor with Schottky barriers for highly specific and sensitive human α-thrombin detection. The active sensor area is decorated with thrombin-binding aptamers as receptor molecules. Each sensor chip is integrated into a microfluidic device for flow-through measurements. Instantaneous detection is provided by real-time monitoring of FET...
An ultra-low power regulated charge pump system based on charge recycling between a tank capacitor and the charge pump output load capacitor is presented. The proposed circuit is implemented using a 55 nm UMC High Voltage CMOS technology with a power supply of 1.2V. Simulation results show a maximum current reduction of about 38% compared to a conventional regulated charge pump system. Rise time until...
Redox-based resistive switching devices can be switched between a high resistance state and a low resistance state in a reversible manner. An important requirement is the stable operation between these two states for a high amount of switching cycles. In this work the switching dynamics of these devices are investigated by means of device simulation. Hereby, we discuss the conditions for which a fading...
In this work, we present a combined analysis on the statistical variability of threshold voltage, on-state current, and leakage current of III-V ultra-scaled MOSFETs. In addition, we analyze the sensitivity of threshold voltage to critical geometrical and process parameters variations (i.e., gate length, channel thickness, oxide thickness and channel doping). Our analysis verifies the scaling potential...
The most of the memristor based applications which have been proposed so far have not considered the parasitic components. In this paper, we apply a generic memristor model which includes the parasitic effects to our proposed memristive logic architectures. First, we show that the current response of the memristor has the decaying oscillation when the unit step function is applied. Then we demonstrated...
Through Silicon Vias (TSVs) are crucial elements for the reliable operation and the yield of three dimensional integrated circuits (3D ICs). Resistive open defects are a serious concern in TSV structures. In this paper, a post-bond, parallel testing technique is proposed for the detection and location of resistive open defects in TSVs, which is based on easily synthesizable all digital testing circuitry...
Approximate computing introduces a new era of low-power and high-speed circuit designs. Instead of strict accurate computation, relaxed requirements might increase performance and reduce power consumption with a simplified or inaccurate circuit. One of the recent remarkable research efforts is the accuracy-configurable approximate adder designs, which can gracefully operate in both approximate (inaccurate)...
Performance slack in IoT applications is routinely exploited in sensor nodes to minimize power by aggressive voltage scaling. However, scaling voltage to sub-threshold levels causes severe degradation in performance and is prone to On Chip Variation (OCV). In contrast, Near Threshold Voltage (NTV) operation offers a good balance between performance loss, OCV and energy reduction and is promising for...
We describe an analysis of the main process parameters variability involved in electrical and optical output characteristics of an optical sensor integrating a standard silicon-based NWell in p-epitaxial substrate photodiode and an UV/IR blocking interference filter. This study is done with TCAD simulation following a standard 0.18 μm high voltage CMOS technology fabrication process. The TCAD simulations...
In this paper, we present a simple analytical delay model for memristive memory cells. The output voltage evolution is obtained analyzing the charge-flux dynamics when a voltage ramp is applied to the input. From this evolution, the propagation delay is calculated. The model is validated using the VTEAM memristor model for different input rise time values of the applied ramp. The proposed model can...
As the importance of the thermal issues in the design of multiprocessor systems increases, it becomes mandatory to analyze the thermal effects and the thermal management techniques early in the design flow, ideally during the hardware emulation phase. Moreover, several scenarios (multiprocessor systems connected with photonic NoCs, 3D systems, etc.) demand a high accuracy during the thermal emulation...
Managing the power in highly-integrated systems on chips becomes inevitable in modern designs. Complex systems require complex power management, and it is always difficult to determine whether the designed power management is the most efficient. In our previous work, we have proposed a simplified power-management specification method at the system level of abstraction. In this paper, we propose a...
This paper explores the feasibility, in terms of performance and reliability, of gain-cell embedded DRAM (eDRAM) to be operative at sub-threshold range, when they are implemented with 10nm FinFET devices. The use of individual transistor resizing in order to achieve better cell performance (i.e. retention time, access time, and energy consumption) at the sub-VT operating level is studied. In this...
Susceptibility of modern ICs to radiation-induced faults constitutes a matter of great concern in the recent years. Particularly, the transient faults and their impact on the combinational logic remain an intriguing issue, since the evaluation of their behavior is quite significant, especially for critical systems, for the development of error-resistant techniques in design process. For an accurate...
Brightness scaling is the most common way to reduce power consumption in OLED displays. Such “dimming” is generally static, i.e. it is applied either manually by the user, or automatically by the system in correspondence of predefined battery state-of-charge conditions. This is obviously sub-optimal, because it makes brightness adaptation (i) too coarse-grain in time, and (ii) agnostic of the image...
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