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This paper presents a wide intermediate-frequency (IF) bandwidth down-conversion double-balanced Gilbert-cell mixer design in a 0.13-μm CMOS process. The load stage of the mixer is implemented by an LC tank with switched capacitors to complete three selectable sub-bands to cover the desired wide IF band. Both the RF and LO ports are integrated with Marchand baluns for single-phase input consideration...
Reducing leakage dissipation is becoming more and more important in low-power design. The dynamic energy dissipation reduction of adiabatic circuits using power-gating schemes has been introduced. In order to reduce leakage losses of the adiabatic circuits using power-gating schemes under deep submicron process, this paper proposes a MTCMOS (Multi-Threshold CMOS) power-gating scheme for adiabatic...
A review of dynamic and adaptive techniques for power management of on-chip interconnects, under emerging design considerations, is presented. The progress of IC technology has introduced novel methods, architectures and new challenges for power-aware design exploration. An examination of state-of-the-art power management techniques enables feasible and efficient design of future NoC platforms. This...
Networks on chip (NoC), a new packet-based design method, with a new dependable no deadlock (DND) back-tracking routing algorithm are proposed to implement artificial neural network (ANN). This system is simulated by NIRGAM NoC simulator to get system performance. Experimental results show that this proposed system has higher connection-per-second (CPS), lower communication load than the exiting other...
Voltage regulation in system-on-chip has turned into a very critical challenge for nanoscale IC designers. It is imperative that for multi-core implementation on-chip voltage regulator offers enormous benefits. This paper discusses the advantages and disadvantages of using on-chip regulators as well as their functional operation. Furthermore, it introduces the technique of using a hot swap controller...
In this contribution, the analysis on high frequency class E design approach is presented. Starting from the classical theory, a numerical analysis is performed to extend class E feasibility at higher frequencies. The design of hybrid class-E amplifier in LDMOS technology for UMTS base-station applications will be presented, in order to validate the theoretical results. The simulated PA reaches an...
Two wideband LC VCOs, customized for IEEE 802.15.4a applications, are presented in this paper. Both circuits have been designed and implemented in a 90-nm CMOS technology. The first VCO has been designed for the 3.1-5 GHz UWB band. It exhibits a tuning range of 40% from 3.2 GHz to 4.8 GHz with a tuning voltage of 1.2 V. The measured phase noise at 1-MHz offset from a 4-GHz carrier is -114 dBc/Hz....
A three-dimensional (3D) IC technology platform for high-performance, heterogeneous integration of silicon ICs for mm-wave smart antenna transceivers is presented. The platform uses dielectric adhesive bonding of fully-processed wafer-to-wafer aligned ICs, followed by a three-step thinning process and copper damascene patterning to form inter-wafer interconnects. A low noise amplifier (LNA), power...
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