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The purpose of this article is to study the dynamic reconfiguration in FPAA and, because of its potential, its academic applications. State driven and algorithmic reconfiguration methods have been considered during this work. Since these devices are not as well-known as FPGA, it is interesting to study its characteristics and abilities. The algorithmic method has been developed, obtaining conclusions...
In this paper we propose new attack on dynamic watermark scheme Radix-n widely known as one of the most secure. It was shown that we are able to reveal dynamically allocated memory blocks and then a digital watermark can be discovered by hooking API function calls. During the experiment it was ascertained that often an amount of such structures is low because of widely used optimization. This feature...
NVRAM, such as STT-MRAM and 3D XPoint, enables persistent heap to replace existing file systems for data persistence. The persistent heap can eliminate the overhead of serializing the data structure into the file address space by granting persistence to the data structure. In this paper, we defined a persistent object store for persistent heap, and developed a namespace and persistent object management...
The common DPU platform for ESA JUICE mission instruments is a hardware and software platform developed by Cobham Gaisler for the scientific instrument payloads of the European Space Agency Jupiter Icy Moons spacecraft. The hardware is based around the GR712RC dual-core LEON3-FT processor with GRSPW2 SpaceWire interfaces. To accompany the JUICE instrument hardware, a flight quality SpaceWire software...
Non-volatile memory is a promising material that covers both cache and secondary storage in a memory hierarchy. Many software platforms exploiting non-volatile have been developed and provide user-level programming interfaces. However, common programs cannot allocate non-volatile memory. In this paper, we introduce a code generation method for HEAPO that is one of non-volatile memory software platforms...
Radio-Frequency Identification (RFID) technology enables sensors to track objects of intelligent manufacturing systems. The amount data resulting from the primitive RFID reading poses some interesting challenges for the data management. A software solution based on a special protocol communication is proposed. The proposed solution allows cleaning data and errors identification when the communication...
Physical attacks, such as fault attacks, pose a decisive threat for the security of devices in the Internet of Things. An important class of countermeasures for fault attacks is fault tolerant software that is applicable for systems based on COTS hardware. In order to evaluate software countermeasures against fault attacks, fault injection is needed. However, established fault injection approaches...
This paper describes a lightweight software library to solve the challenges [6], [3], [1], [5], [2] of programming storage class memory (SCM). It provides primitives to demarcate failure-atomic code regions. SCM loads and stores within each demarcated code region (called a “wrap”) are routed through the library, which buffers updates and transmits them to SCM locations asynchronously while allowing...
This work explores different means to implement software defined cellular radio over the cloud, which sets stringent real-time requirements. DPDK and MKL are two technologies proposed by Intel that can be used for that purpose. In this paper, we explore those technologies and using operating system isolation to reduce the computation time variability for LTE processes. It is found that MKL offers...
Over the last decade, the looming power wall has spurred a flurry of interest in developing heterogeneous systems with hardware accelerators. The questions, then, are what and how accelerators should be designed, and what software support is required. Our accelerator design approach stems from the observation that many efficient and portable software implementations rely on high performance software...
Most Wireless Sensor Network platforms — such as the Mica, Iris, and Telos B families of motes — use low-power 8-bit microprocessors which have limited memory and processing capabilities, thus requiring researchers to implement communication protocols and data processing routines using low-level programming practices that are tedious and cumbersome. Rich features available in modern desktop operating...
Developers of certified, safety-critical avionics software face many challenges. A key challenge arises when software developed for one system is reused in another system. Given the features and capabilities of most Commercial-Off-The-Shelf (COTS) safety-critical Real-Time Operating Systems (RTOSs), reusing software in a different target environment means modifying that software and re-incurring costly...
High Performance Computing usually leverages messaging libraries such as MPI orGASNet in order to exchange data among processes in large-scale clusters. Furthermore, these libraries make use of specialized low-level networking layers in order to retrieve as much performance as possible from hardware interconnects such as Infini Band or Myrinet, for example. EXTOLL is another emerging technology targeted...
The decomposition of robotics software into a collection of loosely coupled processes has become a core design principle of virtually every large robotics software engineering effort over the past decade. Recently, the ROS software platform from Willow Garage has gained significant traction due to its adoption of sound design principles and significant software library contributions from Willow Garage...
We present an overview or the video games available at the Film Library of Bologna. This institution, in collaboration with the University of Bologna, has a whole collateral branch dedicated to the video games, as they can be considered a recreational activity somehow related to movies. This collection of video games conceptually starts from the ones that are strictly connected to movies, and then...
The ability to map a high level algorithm either to hardware or software simplifies design space exploration of cyber-physical systems. Thereby, low level tools can be utilized for accurate design parameter estimation, which helps to evaluate the effect of system level design decisions. Especially complex data structures pose a problem in this context. The different structure of memory in hardware...
Aiming at the design of the small PLC timer system, based on the analysis of operational characteristics of PLC timer and the process of PLC user timer program and the data transmission requirements of PLC user program execution module and the timer, a method which applies the FPGA Parallel algorithm to designing small PLC timer system, is presented. The timer system is composed of clock generator...
This paper presents the architecture and design concept of a low-cost, light weight, computational framework intended primarily for the navigation of small autonomous vehicles. The proposed system integrates GPS, inertial sensor, magnetometer and range-finder modules together with a high-performance microcontroller. Debugging facilities and various data communication and storage facilities are proposed...
Current petascale systems have tens of thousands of hardware components and complex system software stacks, which increase the probability of faults occurring during the lifetime of a process. Checkpointing has been a popular method of providing fault tolerance in high-end systems. While considerable research has been done to optimize checkpointing, in practice the method still involves a high-cost...
Random number generation is a very important operation in computational science e.g. in Monte Carlo simulations methods. It is also a computationally intensive operation especially for high quality random number generation. In this paper, we present the design and implementation of a parallel implementation of one of the most widely used random number generators, namely the Mersenne Twister. The latter...
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