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With the rapid growth in the mobile industry, Package-on-Package (PoP) technology has been widely adopted for the 3D integration of logic and memory devices within mobile handsets and other portable multimedia products. The PoP solution offers significant advantages, including increased density through stacking logic and memory devices in the same formfactor and a high degree of flexibility for variable...
The resonance frequencies and mode shapes of aPCB are highly depended on form factor and stack-up. Moreover, the interaction with components mounted to the PCB cannot a priori be neglected. In the search for key parameters that might impact the outcome of a board level vibration test, it is important to asses the impact of these factors on the principal PCB vibrational characteristics. The resonance...
This paper presents results of fracture tests on Multilayer Ceramic Capacitors (MLCCs). Fracture mechanical calculations were carried out with ANSYS in order to analyse the experimental values of fracture strength for the tested MLCCs. Subsequent metallographic analyses were used to get a precise picture of the origin and the propagation of the crack through the component.
3-D finite element models of SOP (Small Outline Package) were constructed, in which Anand visco-plasticity constitutive equation was used to describe the mechanic behavior of solder joint. The solder joint deformation and stress distribution with five kinds of lead shapes were researched. The experimental program for the identification of numeri3cal simulation was performed with three kinds of lead...
Thinner organic BGA packages typically lead to higher warpage before surface mount which, after reflow, causes package corner solder joints (SJ) to have higher stand-off compared to solder joints in the package center. Hence the solder joints at package corners can change from typical barrel shape to an elongated hour-glass shape. Conventional understanding of the impact of SJ height on temperature...
3-D finite element models of SOP (Small Outline Package) were constructed, in which Anand visco-plasticity constitutive equation was used to describe the mechanic behavior of solder joint. The solder joint deformation and stress distribution with five kinds of lead shapes were researched. The experimental program for the identification of numeri3cal simulation was performed with three kinds of lead...
This study focuses on the development of a highly reliable solder bumping solution by the optimization of bump height and shape for flip-chip mounting of large die directly on PCB without the use of underfill. To achieve the goal, an elongated solder joint with an optimized shape has been developed that demonstrated far superior board-level thermo-mechanical reliability to that of the conventional...
The purpose of this paper is to compare the ability of solder joint with different shape (hourglass-shaped, barrel-shaped and cylinder-shaped) to resist destruction under drop impact loadings. Three 3D finite element models of VFBGA (very-thin-profile fine-pitch BGA) packages, including different shape of solder joints, are established respectively. According to the condition B in the drop test standard...
Interfacial fracturing is the most important failure mode of solder joints. In this paper, interfacial stresses of Cu pad/solder interfaces are evaluated based on the theory of interfacial mechanics and the finite element method. Effects of solder joint shapes and solder materials on the stress intensity are investigated. The results show that Sn37Pb/Cu interface has greater stress intensity than...
Board level solder joint reliability performance during drop test is a critical concern to semiconductor and electronic product manufacturers. In this paper, a new compliant Wafer Level Package technology is proposed which can accommodate the CTE mismatch between the chip and PCB substrate and consequently should be more reliable without the application of underfill. The purpose of this study is to...
In order to increase the fatigue life of chip resistor, it is necessary to optimize the shape of solder joints. Shape and fatigue life of chip resistor solder joint were predicted by using finite element analysis methods. Through changing the solder volume, four typical solder joint shape prediction were conducted, and three-dimensional mechanical model of fatigue life analysis was set up. The distribution...
This paper targets the reliability of electronics components, specially avionics and automotive electronic system, under random vibration conditions. A fatigue life estimation procedure is presented and each step of procedure is explained. Finite Element model of the test vehicle is built in ANSYS. The model is first validated by correlating the natural frequencies, mode shapes and transmissibility...
This paper documents simulation studies on the interactive effect of standoff height and void volume on the thermomechanical durability of ball-grid-array solder joints using a 3-D viscoplastic finite element analysis. Surface Evolver software was used to find the optimized shape of the solder joints and standoff height by minimizing the surface energy as voids with different sizes were placed in...
The effect of thinning down the chip thickness, will affect the stress pattern in the chip and causes the chip to deform locally when the thickness of the chip is thinner than a certain critical value. Such a local deformation may cause sharp gradient of residual stress around the solder bumps and thus, various failures. This paper shows that by considering the effect of solder bumps on a 50 mum chip,...
To increase miniaturization, CSWLP (chip size wafer level packaging) has been developed. However, the difficulty to get good solder joint reliability leads to manufacture only small CSWLP modules. Different underfill methods are evaluated here, by measurements and simulations: results prove that underfill is necessary, but a bad choice can also decrease the reliability. An original method called ldquore-enforcementrdquo...
Four process parameters including, the pad length, the pad width, the stencil thickness and the stand-off, are chosen as four control factors, and by using an L25(56) orthogonal array, the no-fillet chip component solder joints shapes with 25 different process parameters combinations are established. And then all the shape prediction models of the 25 solder joints are built through the Surface Evolver...
This paper deals with hand lead-free soldering process optimization. The work is focused on the impact of solder pads shape in combination with solder pads finish on lead-free solder joints reliability.
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